On 19:38 Sun 02 Nov , [EMAIL PROTECTED] wrote: > Subject: [PATCH 08/13 v5] ARM: OMAP3: Add MMC support > > From: Dirk Behme <[EMAIL PROTECTED]> > + > +/* > + * OMAP HSMMC register definitions > + */ > +#define OMAP_HSMMC_SYSCONFIG (*(unsigned int *) 0x4809C010) > +#define OMAP_HSMMC_SYSSTATUS (*(unsigned int *) 0x4809C014) > +#define OMAP_HSMMC_CON (*(unsigned int *) 0x4809C02C) > +#define OMAP_HSMMC_BLK (*(unsigned int *) 0x4809C104) > +#define OMAP_HSMMC_ARG (*(unsigned int *) 0x4809C108) > +#define OMAP_HSMMC_CMD (*(unsigned int *) 0x4809C10C) > +#define OMAP_HSMMC_RSP10 (*(unsigned int *) 0x4809C110) > +#define OMAP_HSMMC_RSP32 (*(unsigned int *) 0x4809C114) > +#define OMAP_HSMMC_RSP54 (*(unsigned int *) 0x4809C118) > +#define OMAP_HSMMC_RSP76 (*(unsigned int *) 0x4809C11C) > +#define OMAP_HSMMC_DATA (*(unsigned int *) 0x4809C120) > +#define OMAP_HSMMC_PSTATE (*(unsigned int *) 0x4809C124) > +#define OMAP_HSMMC_HCTL (*(unsigned int *) 0x4809C128) > +#define OMAP_HSMMC_SYSCTL (*(unsigned int *) 0x4809C12C) > +#define OMAP_HSMMC_STAT (*(unsigned int *) 0x4809C130) > +#define OMAP_HSMMC_IE (*(unsigned int *) 0x4809C134) > +#define OMAP_HSMMC_CAPA (*(unsigned int *) 0x4809C140) > + > +/* T2 Register definitions */ > +#define CONTROL_DEV_CONF0 (*(unsigned int *) 0x48002274) > +#define CONTROL_PBIAS_LITE (*(unsigned int *) 0x48002520)
please just define the register and as we agree use readx/writex please note that their is a new MMC Framework in progress please take a look Andy, Haavard please comment. Best Regards, J. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
