On Fri, Oct 31, 2008 at 03:30:33PM +0100, Juergen Schoew wrote:
> +#ifdef CONFIG_CMD_NAND
> +void firetux_nandflash_init(void)
> +{
> +     /* Hardware configuration */
> +     /* setup GPIOB18 / FMP40 to GPIO input with internal pullup */
> +     /* clear bits */
> +     *(vu_long *)(PNX8181_SCON_BASE + PNX8181_SYSMUX3) &= ~(0x30);
> +     /* set FPM40 to GPIOb18 */
> +     *(vu_long *)(PNX8181_SCON_BASE + PNX8181_SYSMUX3) |= 0x10;
> +     /* set to input */
> +     *(vu_long *)PNX8181_GPIOB_DIRECTION &= ~(1 << 18);
> +     /* set pull up */
> +     *(vu_long *)(PNX8181_SCON_BASE + PNX8181_SYSPAD2) &= ~(3 << 20);
> +
> +     /* setup access timing for CS0 */
> +     /* 16bit */
> +     *(vu_long *)(PNX8181_REG_EBI1_CS0 + PNX8181_EBI_MAIN_OFF)  = 0x0001;
> +     *(vu_long *)(PNX8181_REG_EBI1_CS0 + PNX8181_EBI_READ_OFF)  = 0x1FFFF;
> +     *(vu_long *)(PNX8181_REG_EBI1_CS0 + PNX8181_EBI_WRITE_OFF) = 0x1FFFF;
> +     *(vu_long *)(PNX8181_REG_EBI1_CS0 + PNX8181_EBI_BURST_OFF) = 0x0CF8;
> +}

writel() rather than direct access.

> +static void firetux_nand_hwcontrol(struct mtd_info *mtd, int dat,
> +                                             unsigned int ctrl)
> +{
> +     struct nand_chip *chip = mtd->priv;
> +     unsigned long IO_ADDR_W = (ulong)chip->IO_ADDR_W;
> +
> +     if (ctrl & NAND_CLE)
> +             IO_ADDR_W += CONFIG_SYS_NAND_CLE_ADDR;
> +
> +     if (ctrl & NAND_ALE)
> +             IO_ADDR_W += CONFIG_SYS_NAND_ALE_ADDR;
> +
> +     if (dat != NAND_CMD_NONE) {
> +             if (chip->options & NAND_BUSWIDTH_16)
> +                     writew((unsigned short)dat, IO_ADDR_W);
> +             else
> +                     writeb((unsigned char)dat, IO_ADDR_W);
> +     }
> +}

writew/writeb take pointers, not integer addresses.

> +static int firetux_nand_readybusy(struct mtd_info *mtd)
> +{
> +     return (int)((readl(CONFIG_SYS_NAND_RB_PORT) >> 18) & 1);
> +}

Unnecessary cast.  Pass a pointer to readl().

> +int board_nand_init(struct nand_chip *nand)
> +{
> +     nand->cmd_ctrl   = firetux_nand_hwcontrol;
> +     nand->dev_ready  = firetux_nand_readybusy;
> +     nand->chip_delay = 20;
> +     nand->ecc.mode   = NAND_ECC_SOFT;
> +     nand->options    = NAND_USE_FLASH_BBT | NAND_BBT_CREATE | NAND_BBT_WRITE
> +                      | NAND_BBT_VERSION ;

You cannot pass BBT options as chip options.  Of the above, only
NAND_USE_FLASH_BBT is a chip option.

Is there any reason you don't use nand_spl?

-Scott
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