Hi Clive,
ok.
Alignment should not be problem on Microblaze cpu.
Could you please resubmit and CC Ben Warren?
This patch could go through network custodian tree.
Acked-by: Michal Simek <[EMAIL PROTECTED]>
Thanks,
Michal
> Michal,
>
> I don't agree,
>
> It is like that to ensure you can access it as 32bit aligned.
>
> Cheers
> Clive
>
>
> On Thu, 23 Oct 2008, Michal Simek wrote:
>
>> Hi Clive,
>>
>> yes. but I think that better will be
>>
>> static uchar etherrxbuff[PKTSIZE_ALIGN]; /* Receive buffer */
>>
>> Regards,
>> Michal
>>
>>
>>> Hi
>>>
>>> Looks like there is a buffer allocation error in the packet buffer
>>> for the
>>> xilinx emaclite.
>>>
>>>
>>> diff --git a/drivers/net/xilinx_emaclite.c
>>> b/drivers/net/xilinx_emaclite.c
>>> index 88cd0f9..0e96ef1 100644
>>> --- a/drivers/net/xilinx_emaclite.c
>>> +++ b/drivers/net/xilinx_emaclite.c
>>> @@ -70,7 +70,7 @@ typedef struct {
>>>
>>> static xemaclite emaclite;
>>>
>>> -static char etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */
>>> +static u32 etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */
>>>
>>> /* hardcoded MAC address for the Xilinx EMAC Core when env is
>>> nowhere*/
>>> #ifdef CONFIG_ENV_IS_NOWHERE
>>>
>>> Cheers
>>> Clive
>>> _______________________________________________
>>> U-Boot mailing list
>>> U-Boot@lists.denx.de
>>> http://lists.denx.de/mailman/listinfo/u-boot
>>>
>>
>
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