From: Paul Driveklepp <[EMAIL PROTECTED]> This patch adds support for the ATEVK1100 evaluation kit, which contains an AT32UC3A0512ES chip.
Signed-off-by: Gunnar Rangoy <[EMAIL PROTECTED]> Signed-off-by: Paul Driveklepp <[EMAIL PROTECTED]> Signed-off-by: Olav Morken <[EMAIL PROTECTED]> --- Makefile | 3 + board/atmel/atevk1100/Makefile | 44 +++++++++ board/atmel/atevk1100/atevk1100.c | 97 ++++++++++++++++++ board/atmel/atevk1100/config.mk | 4 + board/atmel/atevk1100/u-boot.lds | 75 ++++++++++++++ include/configs/atevk1100.h | 194 +++++++++++++++++++++++++++++++++++++ 6 files changed, 417 insertions(+), 0 deletions(-) create mode 100644 board/atmel/atevk1100/Makefile create mode 100644 board/atmel/atevk1100/atevk1100.c create mode 100644 board/atmel/atevk1100/config.mk create mode 100644 board/atmel/atevk1100/u-boot.lds create mode 100644 include/configs/atevk1100.h diff --git a/Makefile b/Makefile index 7c13ce8..7480749 100644 --- a/Makefile +++ b/Makefile @@ -3071,6 +3071,9 @@ hammerhead_config : unconfig mimc200_config : unconfig @$(MKCONFIG) $(@:_config=) avr32 at32ap mimc200 mimc at32ap700x +atevk1100_config : unconfig + @$(MKCONFIG) $(@:_config=) avr32 at32uc atevk1100 atmel at32uc3a0xxx + #======================================================================== # SH3 (SuperH) #======================================================================== diff --git a/board/atmel/atevk1100/Makefile b/board/atmel/atevk1100/Makefile new file mode 100644 index 0000000..b5ba79f --- /dev/null +++ b/board/atmel/atevk1100/Makefile @@ -0,0 +1,44 @@ +# +# (C) Copyright 2001-2006 +# Wolfgang Denk, DENX Software Engineering, [EMAIL PROTECTED] +# +# Copyright (C) 2005-2006 Atmel Corporation +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA + +include $(TOPDIR)/config.mk + +LIB := $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/atmel/atevk1100/atevk1100.c b/board/atmel/atevk1100/atevk1100.c new file mode 100644 index 0000000..105e5c9 --- /dev/null +++ b/board/atmel/atevk1100/atevk1100.c @@ -0,0 +1,97 @@ +/* + * Copyright (C) 2005-2006 Atmel Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> + +#include <asm/io.h> +#include <asm/sdram.h> +#include <asm/arch/clk.h> +#include <asm/arch/hmatrix.h> +#include <asm/arch/portmux.h> + +DECLARE_GLOBAL_DATA_PTR; + +static const struct sdram_config sdram_config = { + /* MT48LC16M16A2-7E (32 MB) */ + .data_bits = SDRAM_DATA_16BIT, + .row_bits = 13, + .col_bits = 9, + .bank_bits = 2, + .cas = 2, + .twr = 2, + .trc = 7, + .trp = 2, + .trcd = 2, + .tras = 4, + .txsr = 7, + /* 7.81 us */ + .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000, +}; + +int board_early_init_f(void) +{ + /* Enable SDRAM in the EBI mux according to AP7000 datasheet */ + hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); + + /* 16 bit data, 24 bit address */ + portmux_enable_ebi(16, 23, 0, PORTMUX_DRIVE_HIGH); + portmux_enable_usart0(PORTMUX_DRIVE_MIN); +#if defined(CONFIG_MACB) + portmux_enable_macb(0, PORTMUX_DRIVE_HIGH); +#endif + + return 0; +} + +phys_size_t initdram(int board_type) +{ + unsigned long expected_size; + unsigned long actual_size; + void *sdram_base; + + sdram_base = map_physmem(EBI_SDRAM_BASE, EBI_SDRAM_SIZE, MAP_NOCACHE); + + expected_size = sdram_init(sdram_base, &sdram_config); + actual_size = get_ram_size(sdram_base, expected_size); + + unmap_physmem(sdram_base, EBI_SDRAM_SIZE); + + if (expected_size != actual_size) + printf("Warning: Only %lu of %lu MiB SDRAM is working\n", + actual_size >> 20, expected_size >> 20); + + return actual_size; +} + +int board_early_init_r(void) +{ + /* Physical address of phy (0xff = auto-detect) */ + gd->bd->bi_phy_id[0] = 0xff; + return 0; +} + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bi) +{ + macb_eth_initialize(0, (void *)MACB_BASE, bi->bi_phy_id[0]); + return 0; +} +#endif diff --git a/board/atmel/atevk1100/config.mk b/board/atmel/atevk1100/config.mk new file mode 100644 index 0000000..ca23f88 --- /dev/null +++ b/board/atmel/atevk1100/config.mk @@ -0,0 +1,4 @@ +PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections +PLATFORM_LDFLAGS += --gc-sections +TEXT_BASE = 0x80000000 +LDSCRIPT = $(obj)board/atmel/atevk1100/u-boot.lds diff --git a/board/atmel/atevk1100/u-boot.lds b/board/atmel/atevk1100/u-boot.lds new file mode 100644 index 0000000..3c20979 --- /dev/null +++ b/board/atmel/atevk1100/u-boot.lds @@ -0,0 +1,75 @@ +/* -*- Fundamental -*- + * + * Copyright (C) 2005-2006 Atmel Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") +OUTPUT_ARCH(avr32) +ENTRY(_start) + +SECTIONS +{ + . = 0x80000000; + _text = .; + .text : { + *(.exception.text) + *(.text) + *(.text.*) + } + _etext = .; + + .rodata : { + *(.rodata) + *(.rodata.*) + } + + _end_noreloc = .; + + . = ALIGN(8); + _data = .; + .data : { + *(.data) + *(.data.*) + } + + . = ALIGN(4); + __u_boot_cmd_start = .; + .u_boot_cmd : { + KEEP(*(.u_boot_cmd)) + } + __u_boot_cmd_end = .; + + . = ALIGN(4); + _got = .; + .got : { + *(.got) + } + _egot = .; + + . = ALIGN(8); + _edata = .; + + .bss (NOLOAD) : { + *(.bss) + *(.bss.*) + } + . = ALIGN(8); + _end = .; +} diff --git a/include/configs/atevk1100.h b/include/configs/atevk1100.h new file mode 100644 index 0000000..db5af37 --- /dev/null +++ b/include/configs/atevk1100.h @@ -0,0 +1,194 @@ +/* + * Copyright (C) 2005-2006 Atmel Corporation + * + * Configuration settings for the ATEVK1100 evaluation kit + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <asm/arch/memory-map.h> + +#define CONFIG_AVR32 1 +#define CONFIG_AT32UC 1 +#define CONFIG_AT32UC3A0xxx 1 +#define CONFIG_ATEVK1100 1 + +/* + * Timer clock frequency. We're using the CPU-internal COUNT register + * for this, so this is equivalent to the CPU core clock frequency + */ +#define CFG_HZ 1000 + +/* + * Set up the PLL to run at 132 MHz, and the CPU, PBA and PBB to run at PLL/2. + * fVCO = (CFG_OSC0_HZ * CFG_PLL0_MUL) / CFG_PLL0_DIV + * fPLL = fVCO / ((CFG_PLL0_OPT & 0x2) ? 2 : 1) + */ +#define CONFIG_PLL 1 +#define CFG_POWER_MANAGER 1 +#define CFG_OSC0_HZ 12000000 +#define CFG_PLL0_DIV 1 +#define CFG_PLL0_MUL 11 +#define CFG_PLL0_SUPPRESS_CYCLES 64 +/* + * Set the CPU running at: + * PLL / (2^CFG_CLKDIV_CPU) = CPU MHz + */ +#define CFG_CLKDIV_CPU 1 +/* + * Set the PBA running at: + * PLL / (2^CFG_CLKDIV_PBA) = PBA MHz + * On the atuc3a0512es, the maximum clock rate of PBA is 33 MHz. + */ +#define CFG_CLKDIV_PBA 1 +/* + * Set the PBB running at: + * PLL / (2^CFG_CLKDIV_PBB) = PBB MHz + */ +#define CFG_CLKDIV_PBB 1 + + +/* + * The PLLOPT register controls the PLL like this: + * + * Select the operating range for the PLL. + * PLLOPT[0]: Select the VCO frequency range. + * PLLOPT[1]: Enable the extra output divider. + * PLLOPT[2]: Disable the Wide-Bandwidth mode (Wide-Bandwidth mode allows a faster startup time and out-of-lock time). + * + * We want to run the cpu at 66 MHz, and the fVCO of the PLL at 132 MHz. + */ +#define CFG_PLL0_OPT 0x03 + + +#define CONFIG_USART0 1 +#undef CONFIG_USART1 +#undef CONFIG_USART2 +#undef CONFIG_USART3 + +/* User serviceable stuff */ +#define CONFIG_DOS_PARTITION 1 + +#define CONFIG_CMDLINE_TAG 1 +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +#define CONFIG_STACKSIZE (2048) + +#define CONFIG_BAUDRATE 9600 +#define CONFIG_BOOTARGS \ + "console=ttyS0 root=/dev/mmcblk0p1 fbmem=600k rootwait=1" + +#define CONFIG_BOOTCOMMAND \ + "fsload; bootm $(fileaddr)" + +/* + * Only interrupt autoboot if <space> is pressed. Otherwise, garbage + * data on the serial line may interrupt the boot sequence. + */ +#define CONFIG_BOOTDELAY -1 +#define CONFIG_AUTOBOOT 0 +#define CONFIG_AUTOBOOT_KEYED 1 +#define CONFIG_AUTOBOOT_PROMPT \ + "Press SPACE to abort autoboot in %d seconds\n", bootdelay +#define CONFIG_AUTOBOOT_DELAY_STR "d" +#define CONFIG_AUTOBOOT_STOP_STR " " + +/* + * After booting the board for the first time, new ethernet addresses + * should be generated and assigned to the environment variables + * "ethaddr" and "eth1addr". This is normally done during production. + */ +#define CONFIG_OVERWRITE_ETHADDR_ONCE 1 +#define CONFIG_NET_MULTI 1 + +/* + * BOOTP/DHCP options + */ +#define CONFIG_BOOTP_SUBNETMASK +#define CONFIG_BOOTP_GATEWAY + + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DHCP + +#undef CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_SETGETDCR +#undef CONFIG_CMD_XIMG + +/* Ethernet - RMII mode */ +#define CONFIG_MACB 1 +#define CONFIG_RMII 1 + +#define CONFIG_ATMEL_USART 1 +#define CONFIG_ATMEL_SPI 1 +#define CONFIG_PORTMUX_GPIO 1 +#define CFG_NR_PIOS 5 +#define CFG_SDRAMC 1 + +#define CFG_DCACHE_LINESZ 32 +#define CFG_ICACHE_LINESZ 32 + +#define CONFIG_NR_DRAM_BANKS 1 + +/* Internal flash on the microcontroller (TODO?) (512kB)*/ +#define CFG_FLASH_BASE 0x80000000 +#define CFG_FLASH_SIZE 0x80000 +#define CFG_MAX_FLASH_BANKS 1 +#define CFG_MAX_FLASH_SECT 135 + +#define CFG_MONITOR_BASE CFG_FLASH_BASE + +#define CFG_INTRAM_BASE INTERNAL_SRAM_BASE +#define CFG_INTRAM_SIZE INTERNAL_SRAM_SIZE +#define CFG_SDRAM_BASE EBI_SDRAM_BASE + +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_SIZE 65536 +#define CONFIG_ENV_ADDR (CFG_FLASH_BASE + CFG_FLASH_SIZE - CONFIG_ENV_SIZE) + +#define CFG_INIT_SP_ADDR (CFG_INTRAM_BASE + CFG_INTRAM_SIZE) + +#define CFG_MALLOC_LEN (256*1024) +#define CFG_DMA_ALLOC_LEN (16384) + +/* Allow 4MB for the kernel run-time image */ +#define CFG_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000) +#define CFG_BOOTPARAMS_LEN (16 * 1024) + +/* Other configuration settings that shouldn't have to change all that often */ +#define CFG_PROMPT "U-Boot> " +#define CFG_CBSIZE 256 +#define CFG_MAXARGS 16 +#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) +#define CFG_LONGHELP 1 + +#define CFG_MEMTEST_START EBI_SDRAM_BASE +#define CFG_MEMTEST_END (CFG_MEMTEST_START + 0x700000) +#define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } + +#endif /* __CONFIG_H */ -- 1.6.0.2 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot