>From eeb4a71a3565098ba43aeb83be163731065a039d Mon Sep 17 00:00:00 2001
From: Alan Carvalho de Assis <[EMAIL PROTECTED]>
Date: Sun, 5 Oct 2008 19:57:22 -0300
Subject: [PATCH] iMX31: Reducing start.S size to let boot from NAND

iMX31 NAND Flash Controller has a 2KB RAM buffer, but the
current start.S file is too much big to let NAND copy routine
to fit in. This patch will reduce the start.S when booting from
NAND Flash.

Signed-off-by: Alan Carvalho de Assis <[EMAIL PROTECTED]>
---
 cpu/arm1136/start.S |   24 ++++++++++++++++++++++--
 1 files changed, 22 insertions(+), 2 deletions(-)

diff --git a/cpu/arm1136/start.S b/cpu/arm1136/start.S
index 51b664d..b24fe41 100644
--- a/cpu/arm1136/start.S
+++ b/cpu/arm1136/start.S
@@ -32,6 +32,15 @@
 #include <version.h>
 .globl _start
 _start: b      reset
+#ifdef CONFIG_BOOT_FROM_NAND
+       b       .       /* Undefined Instruction */
+       b       .       /* Software Interrupt    */
+       b       .       /* Prefetch Abort        */
+       b       .       /* Data Abort            */
+       b       .       /* Reserved              */
+       b       .       /* IRQ                   */
+       b       .       /* FIQ                   */
+#else
 #ifdef CONFIG_ONENAND_IPL
        ldr     pc, _hang
        ldr     pc, _hang
@@ -68,6 +77,7 @@ _irq:                 .word irq
 _fiq:                  .word fiq
 _pad:                  .word 0x12345678 /* now 16*4=64 */
 #endif /* CONFIG_ONENAND_IPL */
+#endif /* CONFIG_BOOT_FROM_NAND */
 .global _end_vect
 _end_vect:

@@ -151,6 +161,7 @@ next:
        bl  cpu_init_crit
 #endif

+_cstartup:
 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
 relocate:                              /* relocate U-Boot to RAM           */
        adr     r0, _start              /* r0 <- current position of code   */
@@ -239,12 +250,18 @@ cpu_init_crit:
         * Jump to board specific initialization... The Mask ROM will have
already initialized
         * basic memory.  Go here to bump up clock rate and handle wake up 
conditions.
         */
+#ifdef CONFIG_BOOT_FROM_NAND
+       ldr     sp, =CFG_INTERNAL_SRAM_STACK    /* Initial stack point in the 
SRAM      */
+       ldr     r0, =_cstartup  /* load the return address              */
+       mov     lr, r0          /* set the return address after remap   */
+       b       lowlevel_init   /* relative branch enables remap        */
+#endif
        mov     ip, lr          /* persevere link reg across call */
        bl      lowlevel_init   /* go setup pll,mux,memory */
        mov     lr, ip          /* restore link */
        mov     pc, lr          /* back to my caller */

-#ifndef CONFIG_ONENAND_IPL
+#if !defined(CONFIG_ONENAND_IPL) && !defined(CONFIG_BOOT_FROM_NAND)
 /*
  *************************************************************************
  *
@@ -357,11 +374,12 @@ cpu_init_crit:
        .macro get_fiq_stack                    @ setup FIQ stack
        ldr     sp, FIQ_STACK_START
        .endm
-#endif /* CONFIG_ONENAND_IPL */
+#endif /* CONFIG_ONENAND_IPL/CONFIG_BOOT_FROM_NAND */

 /*
  * exception handlers
  */
+#ifndef CONFIG_BOOT_FROM_NAND
 #ifdef CONFIG_ONENAND_IPL
        .align  5
 do_hang:
@@ -436,3 +454,5 @@ arm1136_cache_flush:
                mcr     p15, 0, r1, c7, c5, 0   @ invalidate I cache
                mov     pc, lr                  @ back to caller
 #endif /* CONFIG_ONENAND_IPL */
+#endif /* CONFIG_BOOT_FROM_NAND */
+
-- 
1.5.4.3
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