This patch switches landisk to clockintr(9).
We have no direct control over the interrupt clock on these machines
so the patch is relatively simple.
miod@ has been testing it. He reports it has survived a release build
and an upgrade from the resulting bsd.rd.
It could use additional testing, though I don't know how many landisk
machines there are out there.
Index: sys/arch/sh/include/cpu.h
===================================================================
RCS file: /cvs/src/sys/arch/sh/include/cpu.h,v
retrieving revision 1.33
diff -u -p -r1.33 cpu.h
--- sys/arch/sh/include/cpu.h 21 Feb 2022 10:44:58 -0000 1.33
+++ sys/arch/sh/include/cpu.h 6 Nov 2022 11:38:06 -0000
@@ -55,6 +55,7 @@
*/
#include <machine/intr.h>
+#include <sys/clockintr.h>
#include <sys/sched.h>
struct cpu_info {
@@ -70,6 +71,8 @@ struct cpu_info {
#endif
int ci_want_resched;
+
+ struct clockintr_queue ci_queue;
char ci_panicbuf[512];
};
Index: sys/arch/sh/include/_types.h
===================================================================
RCS file: /cvs/src/sys/arch/sh/include/_types.h,v
retrieving revision 1.20
diff -u -p -r1.20 _types.h
--- sys/arch/sh/include/_types.h 5 Mar 2018 01:15:25 -0000 1.20
+++ sys/arch/sh/include/_types.h 6 Nov 2022 11:38:06 -0000
@@ -35,6 +35,8 @@
#ifndef _SH__TYPES_H_
#define _SH__TYPES_H_
+#define __HAVE_CLOCKINTR
+
#if defined(_KERNEL)
typedef struct label_t {
long val[9];
Index: sys/arch/sh/sh/clock.c
===================================================================
RCS file: /cvs/src/sys/arch/sh/sh/clock.c,v
retrieving revision 1.11
diff -u -p -r1.11 clock.c
--- sys/arch/sh/sh/clock.c 20 Oct 2020 15:59:17 -0000 1.11
+++ sys/arch/sh/sh/clock.c 6 Nov 2022 11:38:06 -0000
@@ -33,6 +33,7 @@
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
+#include <sys/clockintr.h>
#include <sys/device.h>
#include <sys/timetc.h>
@@ -205,7 +206,7 @@ sh_clock_get_pclock(void)
void
setstatclockrate(int newhz)
{
- /* XXX not yet */
+ clockintr_setstatclockrate(newhz);
}
u_int
@@ -261,6 +262,12 @@ cpu_initclocks(void)
tick = 1000000 / hz;
tick_nsec = 1000000000 / hz;
+ stathz = hz;
+ profhz = stathz;
+ clockintr_init(0);
+
+ clockintr_cpu_init(NULL);
+
/*
* Use TMU channel 0 as hard clock
*/
@@ -332,7 +339,7 @@ sh3_clock_intr(void *arg) /* trap frame
/* clear underflow status */
_reg_bclr_2(SH3_TCR0, TCR_UNF);
- hardclock(arg);
+ clockintr_dispatch(arg);
return (1);
}
@@ -353,7 +360,7 @@ sh4_clock_intr(void *arg) /* trap frame
/* clear underflow status */
_reg_bclr_2(SH4_TCR0, TCR_UNF);
- hardclock(arg);
+ clockintr_dispatch(arg);
return (1);
}
