On Thu, Jun 23, 2022 at 09:58:48PM -0500, Scott Cheloha wrote:
>
> [...]
>
> Thoughts? Tweaks?
>
> [...]
miod: Any issues?
kettenis: Anything to add? ok?
drahn: Anything to add? ok?
--
It would be nice (but not strictly necessary) to test this on a
machine doing "real work".
Who does the macppc package builds?
Index: macppc/macppc/clock.c
===================================================================
RCS file: /cvs/src/sys/arch/macppc/macppc/clock.c,v
retrieving revision 1.48
diff -u -p -r1.48 clock.c
--- macppc/macppc/clock.c 23 Feb 2021 04:44:30 -0000 1.48
+++ macppc/macppc/clock.c 24 Jun 2022 02:49:58 -0000
@@ -128,6 +128,20 @@ decr_intr(struct clockframe *frame)
return;
/*
+ * We can't actually mask DEC interrupts, i.e. mask MSR(EE),
+ * at or above IPL_CLOCK without masking other essential
+ * interrupts. To simulate masking, we retrigger the DEC
+ * by hand from splx(9) the next time our IPL drops below
+ * IPL_CLOCK.
+ */
+ if (ci->ci_cpl >= IPL_CLOCK) {
+ ci->ci_dec_deferred = 1;
+ ppc_mtdec(UINT32_MAX >> 1); /* clear DEC exception */
+ return;
+ }
+ ci->ci_dec_deferred = 0;
+
+ /*
* Based on the actual time delay since the last decrementer reload,
* we arrange for earlier interrupt next time.
*/
@@ -160,39 +174,35 @@ decr_intr(struct clockframe *frame)
*/
ppc_mtdec(nextevent - tb);
- if (ci->ci_cpl >= IPL_CLOCK) {
- ci->ci_statspending += nstats;
- } else {
- nstats += ci->ci_statspending;
- ci->ci_statspending = 0;
-
- s = splclock();
-
- /*
- * Reenable interrupts
- */
- ppc_intr_enable(1);
-
- /*
- * Do standard timer interrupt stuff.
- */
- while (ci->ci_lasttb < ci->ci_prevtb) {
- /* sync lasttb with hardclock */
- ci->ci_lasttb += ticks_per_intr;
- clk_count.ec_count++;
- hardclock(frame);
- }
-
- while (nstats-- > 0)
- statclock(frame);
-
- splx(s);
- (void) ppc_intr_disable();
-
- /* if a tick has occurred while dealing with these,
- * dont service it now, delay until the next tick.
- */
+ nstats += ci->ci_statspending;
+ ci->ci_statspending = 0;
+
+ s = splclock();
+
+ /*
+ * Reenable interrupts
+ */
+ ppc_intr_enable(1);
+
+ /*
+ * Do standard timer interrupt stuff.
+ */
+ while (ci->ci_lasttb < ci->ci_prevtb) {
+ /* sync lasttb with hardclock */
+ ci->ci_lasttb += ticks_per_intr;
+ clk_count.ec_count++;
+ hardclock(frame);
}
+
+ while (nstats-- > 0)
+ statclock(frame);
+
+ splx(s);
+ (void) ppc_intr_disable();
+
+ /* if a tick has occurred while dealing with these,
+ * dont service it now, delay until the next tick.
+ */
}
void cpu_startclock(void);
Index: macppc/dev/openpic.c
===================================================================
RCS file: /cvs/src/sys/arch/macppc/dev/openpic.c,v
retrieving revision 1.89
diff -u -p -r1.89 openpic.c
--- macppc/dev/openpic.c 21 Feb 2022 10:38:50 -0000 1.89
+++ macppc/dev/openpic.c 24 Jun 2022 02:49:59 -0000
@@ -382,6 +382,10 @@ openpic_splx(int newcpl)
intr = ppc_intr_disable();
openpic_setipl(newcpl);
+ if (ci->ci_dec_deferred && newcpl < IPL_CLOCK) {
+ ppc_mtdec(0);
+ ppc_mtdec(UINT32_MAX); /* raise DEC exception */
+ }
if (newcpl < IPL_SOFTTTY && (ci->ci_ipending & ppc_smask[newcpl])) {
s = splsofttty();
dosoftint(newcpl);
Index: macppc/dev/macintr.c
===================================================================
RCS file: /cvs/src/sys/arch/macppc/dev/macintr.c,v
retrieving revision 1.56
diff -u -p -r1.56 macintr.c
--- macppc/dev/macintr.c 13 Mar 2022 12:33:01 -0000 1.56
+++ macppc/dev/macintr.c 24 Jun 2022 02:49:59 -0000
@@ -170,6 +170,10 @@ macintr_splx(int newcpl)
intr = ppc_intr_disable();
macintr_setipl(newcpl);
+ if (ci->ci_dec_deferred && newcpl < IPL_CLOCK) {
+ ppc_mtdec(0);
+ ppc_mtdec(UINT32_MAX); /* raise DEC exception */
+ }
if ((newcpl < IPL_SOFTTTY && ci->ci_ipending & ppc_smask[newcpl])) {
s = splsofttty();
dosoftint(newcpl);
Index: powerpc/powerpc/intr.c
===================================================================
RCS file: /cvs/src/sys/arch/powerpc/powerpc/intr.c,v
retrieving revision 1.9
diff -u -p -r1.9 intr.c
--- powerpc/powerpc/intr.c 13 Sep 2015 14:06:40 -0000 1.9
+++ powerpc/powerpc/intr.c 24 Jun 2022 02:49:59 -0000
@@ -120,6 +120,11 @@ ppc_dflt_splx(int newcpl)
ci->ci_cpl = newcpl;
+ if (ci->ci_dec_deferred && newcpl < IPL_CLOCK) {
+ ppc_mtdec(0);
+ ppc_mtdec(UINT32_MAX); /* raise DEC exception */
+ }
+
if (ci->ci_ipending & ppc_smask[newcpl])
dosoftint(newcpl);
}
Index: powerpc/include/cpu.h
===================================================================
RCS file: /cvs/src/sys/arch/powerpc/include/cpu.h,v
retrieving revision 1.71
diff -u -p -r1.71 cpu.h
--- powerpc/include/cpu.h 10 Feb 2022 05:48:02 -0000 1.71
+++ powerpc/include/cpu.h 24 Jun 2022 02:49:59 -0000
@@ -55,6 +55,7 @@ struct cpu_info {
volatile int ci_want_resched;
volatile int ci_cpl;
volatile int ci_ipending;
+ volatile int ci_dec_deferred;
volatile int ci_flags;
#define CI_FLAGS_SLEEPING 2
