On Tue, Jun 28, 2022 at 10:37:31PM +1000, Jonathan Gray wrote:
> On Sat, Jun 25, 2022 at 04:21:54AM -0700, Mike Larkin wrote:
> > On Fri, Jun 24, 2022 at 07:19:47PM +1000, Jonathan Gray wrote:
> > > +void
> > > +amd_cpu_cacheinfo(struct cpu_info *ci)
> > > +{
> > > + u_int eax, ebx, ecx, edx;
> > > +
> > > + /* used by vmm */
> > > +
> >
> > If this is the only user of these fields, we can just have vmm(4) issue
> > CPUID on
> > each guest CPUID for these features. I think I was just trying to save some
> > cycles.
> >
> > I'll send out a diff to remove these fields unless you want to tackle it.
>
> sounds good to me
Something like this? I don't have a vmm setup to test.
adds 0x8000001d for amd cache topology
Index: include/cpu.h
===================================================================
RCS file: /cvs/src/sys/arch/amd64/include/cpu.h,v
retrieving revision 1.144
diff -u -p -r1.144 cpu.h
--- include/cpu.h 28 Jun 2022 12:11:41 -0000 1.144
+++ include/cpu.h 29 Jun 2022 23:54:52 -0000
@@ -150,8 +150,6 @@ struct cpu_info {
u_int32_t ci_efeature_eax;
u_int32_t ci_efeature_ecx;
u_int32_t ci_brand[12];
- u_int32_t ci_amdcacheinfo[4];
- u_int32_t ci_extcacheinfo[4];
u_int32_t ci_signature;
u_int32_t ci_family;
u_int32_t ci_model;
@@ -387,7 +385,6 @@ extern u_int cpu_mwait_size;
extern u_int cpu_mwait_states;
/* cacheinfo.c */
-void amd_cpu_cacheinfo(struct cpu_info *);
void x86_print_cacheinfo(struct cpu_info *);
/* identcpu.c */
Index: amd64/cacheinfo.c
===================================================================
RCS file: /cvs/src/sys/arch/amd64/amd64/cacheinfo.c,v
retrieving revision 1.10
diff -u -p -r1.10 cacheinfo.c
--- amd64/cacheinfo.c 28 Jun 2022 12:11:41 -0000 1.10
+++ amd64/cacheinfo.c 30 Jun 2022 00:01:27 -0000
@@ -23,30 +23,6 @@
#include <machine/specialreg.h>
void
-amd_cpu_cacheinfo(struct cpu_info *ci)
-{
- u_int eax, ebx, ecx, edx;
-
- /* used by vmm */
-
- if (ci->ci_pnfeatset >= 0x80000005) {
- CPUID(0x80000005, eax, ebx, ecx, edx);
- ci->ci_amdcacheinfo[0] = eax;
- ci->ci_amdcacheinfo[1] = ebx;
- ci->ci_amdcacheinfo[2] = ecx;
- ci->ci_amdcacheinfo[3] = edx;
- }
-
- if (ci->ci_pnfeatset >= 0x80000006) {
- CPUID(0x80000006, eax, ebx, ecx, edx);
- ci->ci_extcacheinfo[0] = eax;
- ci->ci_extcacheinfo[1] = ebx;
- ci->ci_extcacheinfo[2] = ecx;
- ci->ci_extcacheinfo[3] = edx;
- }
-}
-
-void
amd64_print_l1_cacheinfo(struct cpu_info *ci)
{
u_int ways, linesize, totalsize;
Index: amd64/identcpu.c
===================================================================
RCS file: /cvs/src/sys/arch/amd64/amd64/identcpu.c,v
retrieving revision 1.124
diff -u -p -r1.124 identcpu.c
--- amd64/identcpu.c 26 Apr 2022 10:48:20 -0000 1.124
+++ amd64/identcpu.c 30 Jun 2022 00:04:11 -0000
@@ -605,8 +605,6 @@ identifycpu(struct cpu_info *ci)
freq = cpu_freq(ci);
- amd_cpu_cacheinfo(ci);
-
printf("%s: %s", ci->ci_dev->dv_xname, mycpu_model);
if (freq != 0)
Index: amd64/vmm.c
===================================================================
RCS file: /cvs/src/sys/arch/amd64/amd64/vmm.c,v
retrieving revision 1.315
diff -u -p -r1.315 vmm.c
--- amd64/vmm.c 27 Jun 2022 15:12:14 -0000 1.315
+++ amd64/vmm.c 30 Jun 2022 00:31:03 -0000
@@ -7134,16 +7134,16 @@ vmm_handle_cpuid(struct vcpu *vcpu)
*rdx = curcpu()->ci_brand[11];
break;
case 0x80000005: /* Reserved (Intel), cacheinfo (AMD) */
- *rax = curcpu()->ci_amdcacheinfo[0];
- *rbx = curcpu()->ci_amdcacheinfo[1];
- *rcx = curcpu()->ci_amdcacheinfo[2];
- *rdx = curcpu()->ci_amdcacheinfo[3];
+ *rax = eax;
+ *rbx = ebx;
+ *rcx = ecx;
+ *rdx = edx;
break;
case 0x80000006: /* ext. cache info */
- *rax = curcpu()->ci_extcacheinfo[0];
- *rbx = curcpu()->ci_extcacheinfo[1];
- *rcx = curcpu()->ci_extcacheinfo[2];
- *rdx = curcpu()->ci_extcacheinfo[3];
+ *rax = eax;
+ *rbx = ebx;
+ *rcx = ecx;
+ *rdx = edx;
break;
case 0x80000007: /* apmi */
*rax = eax;
@@ -7156,6 +7156,12 @@ vmm_handle_cpuid(struct vcpu *vcpu)
*rbx = ebx & VMM_AMDSPEC_EBX_MASK;
/* Reset %rcx (topology) */
*rcx = 0;
+ *rdx = edx;
+ break;
+ case 0x8000001d: /* cache topology (AMD) */
+ *rax = eax;
+ *rbx = ebx;
+ *rcx = ecx;
*rdx = edx;
break;
default:
