> > As seen in sys/arch/powerpc64/include/trap.h, not-so-ancient PowerPC and
> > POWER processors define exception addresses past EXC_LAST.
>
> Erh, wait, not really. EXC_AST is "fake" and EXC_USER is a flag that
> indicates we came from userland.
I was referring to the few hardware vectors above 0x2f00 defined in the
powerpc64 trap.h:
#define EXC_DEBUG 0x2f10 /* Debug trap */
#define EXC_VECAST_E 0x2f20 /* Altivec Assist (Book-E) */
#define EXC_SPFPD 0x2f30 /* SPE Floating-point Data */
#define EXC_SPFPR 0x2f40 /* SPE Floating-point Round */
[...]
> Should we rename EXC_LAST to EXC_END? That should avoid confusion
> with the FreeBSD code that I used as a model to implement the
> low-lever powerpc64 code.
Why not. What about that diff, then?
Index: sys/arch/macppc/macppc/machdep.c
===================================================================
RCS file: /OpenBSD/src/sys/arch/macppc/macppc/machdep.c,v
retrieving revision 1.195
diff -u -p -r1.195 machdep.c
--- sys/arch/macppc/macppc/machdep.c 7 Dec 2021 17:50:44 -0000 1.195
+++ sys/arch/macppc/macppc/machdep.c 18 May 2022 06:08:00 -0000
@@ -169,7 +169,7 @@ initppc(u_int startkernel, u_int endkern
/*
* Set up trap vectors
*/
- for (exc = EXC_RSVD; exc <= EXC_LAST; exc += 0x100) {
+ for (exc = EXC_RSVD; exc < EXC_END; exc += 0x100) {
switch (exc) {
default:
bcopy(&trapcode, (void *)exc, (size_t)&trapsize);
@@ -212,7 +212,7 @@ initppc(u_int startkernel, u_int endkern
}
/* Grr, ALTIVEC_UNAVAIL is a vector not ~0xff aligned: 0x0f20 */
- bcopy(&trapcode, (void *)0xf20, (size_t)&trapsize);
+ bcopy(&trapcode, (void *)EXC_VEC, (size_t)&trapsize);
/*
* since trapsize is > 0x20, we just overwrote the EXC_PERF handler
@@ -222,7 +222,7 @@ initppc(u_int startkernel, u_int endkern
* do not generate EXC_PERF exceptions...
*/
- syncicache((void *)EXC_RST, EXC_LAST - EXC_RST + 0x100);
+ syncicache((void *)EXC_RST, EXC_END - EXC_RST);
/*
* Now enable translation (and machine checks/recoverable interrupts).
Index: sys/arch/powerpc/include/trap.h
===================================================================
RCS file: /OpenBSD/src/sys/arch/powerpc/include/trap.h,v
retrieving revision 1.7
diff -u -p -r1.7 trap.h
--- sys/arch/powerpc/include/trap.h 26 Apr 2007 21:36:32 -0000 1.7
+++ sys/arch/powerpc/include/trap.h 18 May 2022 06:08:00 -0000
@@ -58,7 +58,7 @@
#define EXC_DLMISS 0x1100 /* Data load translation miss */
#define EXC_DSMISS 0x1200 /* Data store translation miss
*/
-#define EXC_LAST 0x2f00 /* Last possible exception
vector */
+#define EXC_END 0x3000 /* End of exception vectors */
#define EXC_AST 0x3000 /* Fake AST vector */
Index: sys/arch/powerpc64/include/trap.h
===================================================================
RCS file: /OpenBSD/src/sys/arch/powerpc64/include/trap.h,v
retrieving revision 1.8
diff -u -p -r1.8 trap.h
--- sys/arch/powerpc64/include/trap.h 11 Mar 2021 11:17:00 -0000 1.8
+++ sys/arch/powerpc64/include/trap.h 18 May 2022 06:08:00 -0000
@@ -1,3 +1,4 @@
+/* $OpenBSD$ */
/*-
* SPDX-License-Identifier: BSD-4-Clause
*
@@ -105,7 +106,7 @@
/* POWER8 */
#define EXC_SOFT_PATCH 0x1500 /* POWER8 Soft Patch Exception */
-#define EXC_LAST 0x2f00 /* Last possible exception
vector */
+#define EXC_END 0x3000 /* End of exception vectors */
#define EXC_AST 0x3000 /* Fake AST vector */
Index: sys/arch/powerpc64/powerpc64/machdep.c
===================================================================
RCS file: /OpenBSD/src/sys/arch/powerpc64/powerpc64/machdep.c,v
retrieving revision 1.71
diff -u -p -r1.71 machdep.c
--- sys/arch/powerpc64/powerpc64/machdep.c 6 Dec 2021 21:21:10 -0000
1.71
+++ sys/arch/powerpc64/powerpc64/machdep.c 18 May 2022 06:08:00 -0000
@@ -239,7 +239,7 @@ init_powernv(void *fdt, void *tocbase)
* Initialize all traps with the stub that calls the generic
* trap handler.
*/
- for (trap = EXC_RST; trap < EXC_LAST; trap += 32)
+ for (trap = EXC_RST; trap < EXC_END; trap += 32)
memcpy((void *)trap, trapcode, trapcodeend - trapcode);
/* Hypervisor interrupts needs special handling. */
@@ -262,7 +262,7 @@ init_powernv(void *fdt, void *tocbase)
*((void **)TRAP_RSTENTRY) = cpu_idle_restore_context;
/* Make the stubs visible to the CPU. */
- __syncicache(EXC_RSVD, EXC_LAST - EXC_RSVD);
+ __syncicache(EXC_RSVD, EXC_END - EXC_RSVD);
/* We're now ready to take traps. */
msr = mfmsr();
@@ -305,7 +305,7 @@ init_powernv(void *fdt, void *tocbase)
/* Remove interrupt vectors. */
reg.addr = trunc_page(EXC_RSVD);
- reg.size = round_page(EXC_LAST);
+ reg.size = round_page(EXC_END);
memreg_remove(®);
/* Remove kernel. */
