powerpc has byte-swapping 16 and 32-bit load/stores and we use those
in <machine/endian.h>.
Starting with POWER7 (Power ISA v.2.06), there are also corresponding
64-bit instructions. Do we want to use those on powerpc64? Or do
we want to keep compatibility with older processors?
Index: arch/powerpc64/include/endian.h
===================================================================
RCS file: /cvs/src/sys/arch/powerpc64/include/endian.h,v
retrieving revision 1.1
diff -u -p -r1.1 endian.h
--- arch/powerpc64/include/endian.h 16 May 2020 17:11:14 -0000 1.1
+++ arch/powerpc64/include/endian.h 8 Jun 2020 11:16:33 -0000
@@ -36,7 +36,7 @@ __mswap16(volatile const __uint16_t *m)
__asm("lhbrx %0, 0, %1"
: "=r" (v)
- : "r" (m), "m" (*m));
+ : "r" (m), "m" (*m));
return (v);
}
@@ -48,7 +48,7 @@ __mswap32(volatile const __uint32_t *m)
__asm("lwbrx %0, 0, %1"
: "=r" (v)
- : "r" (m), "m" (*m));
+ : "r" (m), "m" (*m));
return (v);
}
@@ -56,11 +56,11 @@ __mswap32(volatile const __uint32_t *m)
static inline __uint64_t
__mswap64(volatile const __uint64_t *m)
{
- __uint32_t *a = (__uint32_t *)m;
__uint64_t v;
- v = (__uint64_t)__mswap32(a + 1) << 32 |
- (__uint64_t)__mswap32(a);
+ __asm("ldbrx %0, 0, %1"
+ : "=r" (v)
+ : "r" (m), "m" (*m));
return (v);
}
@@ -84,10 +84,9 @@ __swapm32(volatile __uint32_t *m, __uint
static inline void
__swapm64(volatile __uint64_t *m, __uint64_t v)
{
- __uint32_t *a = (__uint32_t *)m;
-
- __swapm32(a + 1, v >> 32);
- __swapm32(a, v);
+ __asm("stdbrx %1, 0, %2"
+ : "=m" (*m)
+ : "r" (v), "r" (m));
}
#define __HAVE_MD_SWAPIO
--
Christian "naddy" Weisgerber na...@mips.inka.de
