Hi all,
Its my first time to contributing to a OpenBSD Project!
so ...
I have Atheros AR2425 Wi-Fi chip (MAC: 0xe2, PHY: 0x70) on my
FijitsuSiemens Laptop (U9210)
I'm trying to connect to my WPA2 wireless but my DMESG is like this:
> ath0: unable to reset hardware.
Please see an attachment my patch for this issue.
I have already tested it on my Laptop. Work's fine: Stable signal and so on.
Please investigate this issue. I am waiting for your feedback.
P.S. If you need more info, just inform me per E-Mail.
Sorry for my English. See you on FOSDEM'18
BR
Oleg Pahl (Munich)
459d458
< #define AR5K_AR5212_DCU_MISC_FRAG_WAIT 0x00000100
1103,1104d1101
< #define AR5K_AR5212_PHY_SCAL_32MHZ_2417 0x0000000a
< #define AR5K_AR5212_PHY_SCAL_32MHZ_HB63 0x00000032
238,240c238
< } else if (hal->ah_mac_version == (AR5K_SREV_VER_AR2425 >> 4) ||
< hal->ah_mac_version == (AR5K_SREV_VER_AR2417 >> 4) ||
< hal->ah_phy_revision == (AR5K_SREV_PHY_2425)) {
---
> } else if (srev == AR5K_SREV_VER_AR2425) {
242,248c240
< hal->ah_single_chip = AH_TRUE;
< hal->ah_radio_5ghz_revision= AR5K_SREV_RAD_2425;
< } else if ((hal->ah_mac_version == (AR5K_SREV_VER_AR2424 >> 4)) ||
< (hal->ah_phy_revision == AR5K_SREV_PHY_5413)) {
< hal->ah_radio = AR5K_AR5413;
< hal->ah_single_chip = AH_TRUE;
< hal->ah_radio_5ghz_revision = AR5K_SREV_RAD_5413;
---
> hal->ah_phy_spending = AR5K_AR5212_PHY_SPENDING_AR5112;
2878a2871
> #if 0
2880a2874
> #endif
626,627d625
< #define AR5K_EEPROM_IS_HB63 0x000b /* Talon detect */
<
770d767
< HAL_BOOL ee_is_hb63;
1241,1242c1238
< #define AR5K_SREV_VER_AR2425 0xe0 /* PCI-Express (Swan, was 0xe2) */
< #define AR5K_SREV_VER_AR2417 0xf0 /* PCI-Express (Nala) */
---
> #define AR5K_SREV_VER_AR2425 0xe2 /* PCI-Express */
1243a1240
>
1255,1256d1251
< #define AR5K_SREV_RAD_5413 0x60
< #define AR5K_SREV_RAD_2425 0xa2
1259,1260c1254
< #define AR5K_SREV_PHY_5413 0x61
< #define AR5K_SREV_PHY_2425 0x70
---
>
89d88
< HAL_BOOL ar5k_ar2425_channel(struct ath_hal *, HAL_CHANNEL *);
894,899d892
< AR5K_EEPROM_READ(AR5K_EEPROM_IS_HB63, val);
< if ((hal->ah_mac_version == (AR5K_SREV_VER_AR2425 >> 4)) && val)
< ee->ee_is_hb63 = AH_TRUE;
< else
< ee->ee_is_hb63 = AH_FALSE;
<
1119,1120d1111
< else if (hal->ah_radio == AR5K_AR2425)
< ret = ar5k_ar2425_channel(hal, channel);
1272,1309d1262
<
< AR5K_PHY_WRITE(0x27, data & 0xff);
< AR5K_PHY_WRITE(0x36, (data >> 8) & 0x7f);
<
< return (AH_TRUE)
< }
<
< HAL_BOOL
< ar5k_ar2425_channel(struct ath_hal *hal, HAL_CHANNEL *channel)
< {
< u_int32_t data, data0, data2;
< u_int16_t c;
<
< data = data0 = data2 = 0;
< c = channel->c_channel + hal->ah_chanoff;
<
< /*
< * Set the channel on the AR2425
< */
< if (c < 4800) {
< data0 = ar5k_bitswap((c - 2272), 8);
< data2 = 0;
< } else if ((c - (c % 5)) != 2 || c > 5435) {
< if (!(c % 20) && c < 5120)
< data0 = ar5k_bitswap(((c - 4800) / 20 << 2), 8);
< else if (!(c % 10))
< data0 = ar5k_bitswap(((c - 4800) / 10 << 1), 8);
< else if (!(c % 5))
< data0 = ar5k_bitswap((c - 4800) / 5, 8);
< else
< return (AH_FALSE);
< data2 = ar5k_bitswap(1, 2);
< } else {
< data0 = ar5k_bitswap((10 * (c - 2) - 4800) / 25 + 1, 8);
< data2 = ar5k_bitswap(0, 2);
< }
<
< data = (data0 << 4) | (data2 << 2) | 0x1001;
