On Fri, Oct 06, 2017 at 03:58:18PM +0200, Mike Belopuhov wrote:
> Hi,
>
> An experimental change to use TSC as a timecounter source on a variety
> of modern Intel and AMD CPUs has been just committed and enabled on
> OpenBSD/amd64 thanks to the work done by Adam Steen.
>
> The rationale is, quoting the commit message:
>
> If frequency of an invariant (non-stop) time stamp counter is measured
> using an independent working timecounter that has a known frequency, we
> can assume that the measured TSC frequency is as good as the resolution
> of the timecounter that we use to perform the measurement. This lets us
> switch from this high quality but expensive source to the cheaper TSC
> without sacrificing precision on a wide range of modern CPUs.
>
> You can query and change the current timecounter source in the runtime
> via sysctl:
>
> % sysctl kern.timecounter.{choice,hardware}
> kern.timecounter.choice=i8254(0) tsc(2000) acpihpet0(1000) acpitimer0(1000)
> dummy(-1000000)
> kern.timecounter.hardware=tsc
>
> Please make sure your NTP drift (/var/db/ntpd.drift) stays within -20..+20
> or at least is not worse than it is right now.
>
> And finally, please make sure to run a "make config" when building the
> kernel to update offset tables because of the cpu_info structure changes.
>
> Regards,
> Mike
>
Hi,
Now that we have an accurate tsc frequency, I would like to expose this
information to userland via a sysctl.
The diff below exposes the tsc frequency and if it is invariant.
Cheers,
Adam
Index: sys/arch/amd64/amd64/machdep.c
===================================================================
RCS file: /cvs/src/sys/arch/amd64/amd64/machdep.c,v
retrieving revision 1.231
diff -u -p -u -p -r1.231 machdep.c
--- sys/arch/amd64/amd64/machdep.c 12 Jul 2017 06:26:32 -0000 1.231
+++ sys/arch/amd64/amd64/machdep.c 7 Oct 2017 09:25:24 -0000
@@ -425,6 +425,8 @@ int
cpu_sysctl(int *name, u_int namelen, void *oldp, size_t *oldlenp, void *newp,
size_t newlen, struct proc *p)
{
+ extern uint64_t amd64_tsc_frequency;
+ extern int amd64_has_invariant_tsc;
extern int amd64_has_xcrypt;
dev_t consdev;
dev_t dev;
@@ -496,6 +498,12 @@ cpu_sysctl(int *name, u_int namelen, voi
pckbc_release_console();
return (error);
#endif
+ case CPU_TSCFREQ:
+ return (sysctl_rdquad(oldp, oldlenp, newp,
+ amd64_tsc_frequency));
+ case CPU_INVARIANTTSC:
+ return (sysctl_rdint(oldp, oldlenp, newp,
+ amd64_has_invariant_tsc));
default:
return (EOPNOTSUPP);
}
Index: sys/arch/amd64/include/cpu.h
===================================================================
RCS file: /cvs/src/sys/arch/amd64/include/cpu.h,v
retrieving revision 1.115
diff -u -p -u -p -r1.115 cpu.h
--- sys/arch/amd64/include/cpu.h 6 Oct 2017 13:33:53 -0000 1.115
+++ sys/arch/amd64/include/cpu.h 7 Oct 2017 09:25:26 -0000
@@ -426,7 +426,9 @@ void mp_setperf_init(void);
#define CPU_XCRYPT 12 /* supports VIA xcrypt in userland */
#define CPU_LIDACTION 14 /* action caused by lid close */
#define CPU_FORCEUKBD 15 /* Force ukbd(4) as console keyboard */
-#define CPU_MAXID 16 /* number of valid machdep ids */
+#define CPU_TSCFREQ 16 /* tsc frequency */
+#define CPU_INVARIANTTSC 17 /* has invariant tsc */
+#define CPU_MAXID 18 /* number of valid machdep ids */
#define CTL_MACHDEP_NAMES { \
{ 0, 0 }, \
@@ -445,6 +447,8 @@ void mp_setperf_init(void);
{ 0, 0 }, \
{ "lidaction", CTLTYPE_INT }, \
{ "forceukbd", CTLTYPE_INT }, \
+ { "tscfreq", CTLTYPE_QUAD }, \
+ { "invarianttsc", CTLTYPE_INT }, \
}
/*
