On Mon, Feb 01, 2016 at 09:06:35PM +0100, Patrick Wildt wrote: > Hi, > > in sxipio the mask is incorrect for get- and setcfg. > > If bit is 1, off is (1 & 7) << 2, which is 4. That means each cfg is 4 > bits wide, so the mask is 0xf and not 0x7. I cross-checked it with > NetBSD and Linux. > > As far as I know it does not fix any known issue for me, it's just > something that caught my eye. > > Patrick > > diff --git sys/arch/armv7/sunxi/sxipio.c sys/arch/armv7/sunxi/sxipio.c > index 9a49343..07a3c76 100644 > --- sys/arch/armv7/sunxi/sxipio.c > +++ sys/arch/armv7/sunxi/sxipio.c > @@ -249,7 +249,7 @@ sxipio_getcfg(int pin) > > splx(s); > > - return data >> off & 7; > + return (data >> off) & 0xf; > } > > void > @@ -263,7 +263,7 @@ sxipio_setcfg(int pin, int mux) > bit = pin - (port << 5); > reg = SXIPIO_CFG(port, bit >> 3); > off = (bit & 7) << 2; > - cmask = 7 << off; > + cmask = 0xf << off; > mask = mux << off; > > s = splhigh(); >
Hi, i think you're wrong, "manuals" for both A10&A20 are rather clear about this. last bit of each cfg is reserved, code doesn't touch the last bit on purpose. see A10 user manual rev1.2 page 288, or A20 user manual rev1.0 page 248 for example of one such cfg register(PA_CFG0). -Artturi
