There is no direct relation with the commit, but i will anyway report the test result on my problematic hardware. The behavior is mostly the same, but now <rl0: watchdog timeout> is spammed by the kernel.
As you can see the system work for more than 40 hours. I really wonder what could be the cause of this, after rebooting the machine reproduce the bug quickly, maybe there is some kind of electric problem. Aug 22 18:00:07 unicorn /bsd: rl0: watchdog timeout # uptime 7:58PM up 1 day, 23:17, 1 user, load averages: 5.23, 5.50, 5.30 # date Fri Aug 22 19:58:38 EDT 2014 # rl0: watchdog timeout rl0: watchdog timeout On Wed, Nov 26, 2014 at 10:10 AM, sven falempin <[email protected]> wrote: > HEllo, > > So i reported a bug with a pci bridge a while ago. On an Apu with a > pci to pci bridge over pci express. > Dmesg below > > I use a recent snapshot > OpenBSD 5.6-current (GENERIC.MP) #610: Tue Nov 25 06:00:07 MST 2014 > > and assume the commit was in > > The situation improved, as i can have the card running with bsd.mp for > more than a second. But on the second boot. > During the first boot i add the <vr3: restarting> kernel message when > asking for a lease on vr3. At this moment my not reliable serial usb > decide to do the classic freez. This time i was not able to get access > to the machine. > > I am currently sending icmp trhough rl and vr and waiting for a problem. > > bug mail objet was : <pci disconnection creates interfaces instabilities> > > dmesg: > > > OpenBSD 5.6-current (GENERIC.MP) #610: Tue Nov 25 06:00:07 MST 2014 > [email protected]:/usr/src/sys/arch/amd64/compile/GENERIC.MP > real mem = 2098520064 (2001MB) > avail mem = 2038870016 (1944MB) > mpath0 at root > scsibus0 at mpath0: 256 targets > mainbus0 at root > bios0 at mainbus0: SMBIOS rev. 2.7 @ 0x7e16d820 (7 entries) > bios0: vendor coreboot version "4.0" date 09/08/2014 > bios0: PC Engines APU > acpi0 at bios0: rev 0 > acpi0: sleep states S0 S1 S3 S4 S5 > acpi0: tables DSDT FACP SPCR HPET APIC HEST SSDT SSDT SSDT > acpi0: wakeup devices AGPB(S4) HDMI(S4) PBR4(S4) PBR5(S4) PBR6(S4) > PBR7(S4) PE20(S4) PE21(S4) PE22(S4) PE23(S4) PIBR(S4) UOH1(S3) > UOH2(S3) UOH3(S3) UOH4(S3) UOH5(S3) [...] > acpitimer0 at acpi0: 3579545 Hz, 32 bits > acpihpet0 at acpi0: 14318180 Hz > acpimadt0 at acpi0 addr 0xfee00000: PC-AT compat > cpu0 at mainbus0: apid 0 (boot processor) > cpu0: AMD G-T40E Processor, 1000.14 MHz > cpu0: > FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,MMX,FXSR,SSE,SSE2,HTT,SSE3,MWAIT,SSSE3,CX16,POPCNT,NXE,MMXX,FFXSR,PAGE1GB,LONG,LAHF,CMPLEG,SVM,EAPICSP,AMCR8,ABM,SSE4A,MASSE,3DNOWP,IBS,SKINIT,ITSC > cpu0: 32KB 64b/line 2-way I-cache, 32KB 64b/line 8-way D-cache, 512KB > 64b/line 16-way L2 cache > cpu0: 8 4MB entries fully associative > cpu0: DTLB 40 4KB entries fully associative, 8 4MB entries fully associative > cpu0: smt 0, core 0, package 0 > mtrr: Pentium Pro MTRR support, 8 var ranges, 88 fixed ranges > cpu0: apic clock running at 200MHz > cpu1 at mainbus0: apid 1 (application processor) > cpu1: AMD G-T40E Processor, 1000.00 MHz > cpu1: > FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,MMX,FXSR,SSE,SSE2,HTT,SSE3,MWAIT,SSSE3,CX16,POPCNT,NXE,MMXX,FFXSR,PAGE1GB,LONG,LAHF,CMPLEG,SVM,EAPICSP,AMCR8,ABM,SSE4A,MASSE,3DNOWP,IBS,SKINIT,ITSC > cpu1: 32KB 64b/line 2-way I-cache, 32KB 64b/line 8-way D-cache, 512KB > 64b/line 16-way L2 cache > cpu1: 8 4MB entries fully associative > cpu1: DTLB 40 4KB entries fully associative, 8 4MB entries fully associative > cpu1: smt 0, core 1, package 0 > ioapic0 at mainbus0: apid 2 pa 0xfec00000, version 21, 24 pins > acpiprt0 at acpi0: bus -1 (AGPB) > acpiprt1 at acpi0: bus -1 (HDMI) > acpiprt2 at acpi0: bus 1 (PBR4) > acpiprt3 at acpi0: bus 2 (PBR5) > acpiprt4 at acpi0: bus 3 (PBR6) > acpiprt5 at acpi0: bus -1 (PBR7) > acpiprt6 at acpi0: bus 5 (PE20) > acpiprt7 at acpi0: bus -1 (PE21) > acpiprt8 at acpi0: bus -1 (PE22) > acpiprt9 at acpi0: bus -1 (PE23) > acpiprt10 at acpi0: bus 0 (PCI0) > acpiprt11 at acpi0: bus 4 (PIBR) > acpicpu0 at acpi0: C2, PSS > acpicpu1 at acpi0: C2, PSS > acpibtn0 at acpi0: PWRB > cpu0: 1000 MHz: speeds: 1000 800 MHz > pci0 at mainbus0 bus 0 > pchb0 at pci0 dev 0 function 0 "AMD AMD64 14h Host" rev 0x00 > ppb0 at pci0 dev 4 function 0 "AMD AMD64 14h PCIE" rev 0x00: msi > pci1 at ppb0 bus 1 > re0 at pci1 dev 0 function 0 "Realtek 8168" rev 0x06: RTL8168E/8111E > (0x2c00), msi, address 00:0d:b9:33:85:d8 > rgephy0 at re0 phy 7: RTL8169S/8110S PHY, rev. 4 > ppb1 at pci0 dev 5 function 0 "AMD AMD64 14h PCIE" rev 0x00: msi > pci2 at ppb1 bus 2 > re1 at pci2 dev 0 function 0 "Realtek 8168" rev 0x06: RTL8168E/8111E > (0x2c00), msi, address 00:0d:b9:33:85:d9 > rgephy1 at re1 phy 7: RTL8169S/8110S PHY, rev. 4 > ppb2 at pci0 dev 6 function 0 "AMD AMD64 14h PCIE" rev 0x00: msi > pci3 at ppb2 bus 3 > re2 at pci3 dev 0 function 0 "Realtek 8168" rev 0x06: RTL8168E/8111E > (0x2c00), msi, address 00:0d:b9:33:85:da > rgephy2 at re2 phy 7: RTL8169S/8110S PHY, rev. 4 > ahci0 at pci0 dev 17 function 0 "ATI SBx00 SATA" rev 0x40: apic 2 int > 19, AHCI 1.2 > scsibus1 at ahci0: 32 targets > ohci0 at pci0 dev 18 function 0 "ATI SB700 USB" rev 0x00: apic 2 int > 18, version 1.0, legacy support > ehci0 at pci0 dev 18 function 2 "ATI SB700 USB2" rev 0x00: apic 2 int 17 > usb0 at ehci0: USB revision 2.0 > uhub0 at usb0 "ATI EHCI root hub" rev 2.00/1.00 addr 1 > ohci1 at pci0 dev 19 function 0 "ATI SB700 USB" rev 0x00: apic 2 int > 18, version 1.0, legacy support > ehci1 at pci0 dev 19 function 2 "ATI SB700 USB2" rev 0x00: apic 2 int 17 > usb1 at ehci1: USB revision 2.0 > uhub1 at usb1 "ATI EHCI root hub" rev 2.00/1.00 addr 1 > piixpm0 at pci0 dev 20 function 0 "ATI SBx00 SMBus" rev 0x42: polling > iic0 at piixpm0 > pcib0 at pci0 dev 20 function 3 "ATI SB700 ISA" rev 0x40 > ppb3 at pci0 dev 20 function 4 "ATI SB600 PCI" rev 0x40 > pci4 at ppb3 bus 4 > ohci2 at pci0 dev 20 function 5 "ATI SB700 USB" rev 0x00: apic 2 int > 18, version 1.0, legacy support > ppb4 at pci0 dev 21 function 0 "ATI SB800 PCIE" rev 0x00 > pci5 at ppb4 bus 5 > ppb5 at pci5 dev 0 function 0 vendor "Pericom", unknown product 0xe111 rev > 0x02 > pci6 at ppb5 bus 6 > ppb6 at pci6 dev 4 function 0 "TI PCI2250" rev 0x02 > pci7 at ppb6 bus 7 > vr0 at pci7 dev 0 function 0 "VIA VT6105M RhineIII" rev 0x96: apic 2 > int 16, address 00:00:24:cf:f5:74 > ukphy0 at vr0 phy 1: Generic IEEE 802.3u media interface, rev. 3: OUI > 0x004063, model 0x0034 > vr1 at pci7 dev 1 function 0 "VIA VT6105M RhineIII" rev 0x96: apic 2 > int 17, address 00:00:24:cf:f5:75 > ukphy1 at vr1 phy 1: Generic IEEE 802.3u media interface, rev. 3: OUI > 0x004063, model 0x0034 > vr2 at pci7 dev 2 function 0 "VIA VT6105M RhineIII" rev 0x96: apic 2 > int 18, address 00:00:24:cf:f5:76 > ukphy2 at vr2 phy 1: Generic IEEE 802.3u media interface, rev. 3: OUI > 0x004063, model 0x0034 > vr3 at pci7 dev 3 function 0 "VIA VT6105M RhineIII" rev 0x96: apic 2 > int 19, address 00:00:24:cf:f5:77 > ukphy3 at vr3 phy 1: Generic IEEE 802.3u media interface, rev. 3: OUI > 0x004063, model 0x0034 > ppb7 at pci6 dev 5 function 0 vendor "Pericom", unknown product 0x8148 rev > 0x00 > pci8 at ppb7 bus 8 > rl0 at pci8 dev 8 function 0 "Realtek 8139" rev 0x10: apic 2 int 17, > address 4c:02:89:00:66:8e > rlphy0 at rl0 phy 0: RTL internal PHY > rl1 at pci8 dev 9 function 0 "Realtek 8139" rev 0x10: apic 2 int 18, > address 4c:02:89:00:66:8d > rlphy1 at rl1 phy 0: RTL internal PHY > rl2 at pci8 dev 10 function 0 "Realtek 8139" rev 0x10: apic 2 int 19, > address 4c:02:89:00:66:8c > rlphy2 at rl2 phy 0: RTL internal PHY > rl3 at pci8 dev 11 function 0 "Realtek 8139" rev 0x10: apic 2 int 16, > address 4c:02:89:00:66:8b > rlphy3 at rl3 phy 0: RTL internal PHY > ohci3 at pci0 dev 22 function 0 "ATI SB700 USB" rev 0x00: apic 2 int > 18, version 1.0, legacy support > ehci2 at pci0 dev 22 function 2 "ATI SB700 USB2" rev 0x00: apic 2 int 17 > usb2 at ehci2: USB revision 2.0 > uhub2 at usb2 "ATI EHCI root hub" rev 2.00/1.00 addr 1 > pchb1 at pci0 dev 24 function 0 "AMD AMD64 14h Link Cfg" rev 0x43 > pchb2 at pci0 dev 24 function 1 "AMD AMD64 14h Address Map" rev 0x00 > pchb3 at pci0 dev 24 function 2 "AMD AMD64 14h DRAM Cfg" rev 0x00 > km0 at pci0 dev 24 function 3 "AMD AMD64 14h Misc Cfg" rev 0x00 > pchb4 at pci0 dev 24 function 4 "AMD AMD64 14h CPU Power" rev 0x00 > pchb5 at pci0 dev 24 function 5 "AMD AMD64 14h Reserved" rev 0x00 > pchb6 at pci0 dev 24 function 6 "AMD AMD64 14h NB Power" rev 0x00 > pchb7 at pci0 dev 24 function 7 "AMD AMD64 14h Reserved" rev 0x00 > usb3 at ohci0: USB revision 1.0 > uhub3 at usb3 "ATI OHCI root hub" rev 1.00/1.00 addr 1 > usb4 at ohci1: USB revision 1.0 > uhub4 at usb4 "ATI OHCI root hub" rev 1.00/1.00 addr 1 > isa0 at pcib0 > isadma0 at isa0 > com0 at isa0 port 0x3f8/8 irq 4: ns16550a, 16 byte fifo > com0: console > com1 at isa0 port 0x2f8/8 irq 3: ns16550a, 16 byte fifo > pcppi0 at isa0 port 0x61 > spkr0 at pcppi0 > lpt0 at isa0 port 0x378/4 irq 7 > usb5 at ohci2: USB revision 1.0 > uhub5 at usb5 "ATI OHCI root hub" rev 1.00/1.00 addr 1 > usb6 at ohci3: USB revision 1.0 > uhub6 at usb6 "ATI OHCI root hub" rev 1.00/1.00 addr 1 > umass0 at uhub0 port 5 configuration 1 interface 0 "Kingston > DataTraveler G2" rev 2.00/2.00 addr 2 > umass0: using SCSI over Bulk-Only > scsibus2 at umass0: 2 targets, initiator 0 > sd0 at scsibus2 targ 1 lun 0: <Kingston, DataTraveler G2, 1.00> SCSI2 > 0/direct removable serial.09511624A940153C02EC > sd0: 1914MB, 512 bytes/sector, 3919872 sectors > umass1 at uhub2 port 1 configuration 1 interface 0 "Generic Flash Card > Reader/Writer" rev 2.01/1.00 addr 2 > umass1: using SCSI over Bulk-Only > scsibus3 at umass1: 2 targets, initiator 0 > sd1 at scsibus3 targ 1 lun 0: <Multiple, Card Reader, 1.00> SCSI2 > 0/direct removable serial.058f6366058F63666485 > vscsi0 at root > scsibus4 at vscsi0: 256 targets > softraid0 at root > scsibus5 at softraid0: 256 targets > root on sd0a (84651833f55b1180.a) swap on sd0b dump on sd0b > > On Fri, Nov 21, 2014 at 12:59 AM, David Gwynne <[email protected]> wrote: >> works on an alpha es45 as well. theo made me do it. >> >>> On 21 Nov 2014, at 13:49, David Gwynne <[email protected]> wrote: >>> >>> working on a 2950. will put try it on a r710 soon. >>> >>> dlg >>> >>>> On 20 Nov 2014, at 19:10, Mark Kettenis <[email protected]> wrote: >>>> >>>> Hi All, >>>> >>>> dlg@ managed to get access to a machine that actually uses 64-bit PCI >>>> addresses behind a bridge. This triggered some bugs in the so far >>>> untested code. Quelle suprprise! >>>> >>>> I'd appreciate it if some people can verify that this doesn't break >>>> other systems. In particular I'm looking for testers on server-type >>>> machines, both i386 and amd64. >>>> >>>> Thanks, >>>> >>>> Mark >>>> >>>> >>>> Index: pci.c >>>> =================================================================== >>>> RCS file: /cvs/src/sys/dev/pci/pci.c,v >>>> retrieving revision 1.106 >>>> diff -u -p -r1.106 pci.c >>>> --- pci.c 26 Oct 2014 16:18:42 -0000 1.106 >>>> +++ pci.c 20 Nov 2014 09:04:51 -0000 >>>> @@ -936,6 +936,12 @@ pci_reserve_resources(struct pci_attach_ >>>> blr = pci_conf_read(pc, tag, PPB_REG_PREFMEM); >>>> base = (blr & 0x0000fff0) << 16; >>>> limit = (blr & 0xfff00000) | 0x000fffff; >>>> +#ifdef __LP64__ >>>> + blr = pci_conf_read(pc, pa->pa_tag, PPB_REG_PREFBASE_HI32); >>>> + base |= ((uint64_t)blr) << 32; >>>> + blr = pci_conf_read(pc, pa->pa_tag, PPB_REG_PREFLIM_HI32); >>>> + limit |= ((uint64_t)blr) << 32; >>>> +#endif >>>> if (limit > base) >>>> size = (limit - base + 1); >>>> else >>>> Index: ppb.c >>>> =================================================================== >>>> RCS file: /cvs/src/sys/dev/pci/ppb.c,v >>>> retrieving revision 1.59 >>>> diff -u -p -r1.59 ppb.c >>>> --- ppb.c 15 Sep 2014 14:22:07 -0000 1.59 >>>> +++ ppb.c 20 Nov 2014 09:04:51 -0000 >>>> @@ -261,7 +261,7 @@ ppbattach(struct device *parent, struct >>>> name = malloc(32, M_DEVBUF, M_NOWAIT); >>>> if (name) { >>>> snprintf(name, 32, "%s pcimem", sc->sc_dev.dv_xname); >>>> - sc->sc_memex = extent_create(name, 0, 0xffffffff, >>>> + sc->sc_memex = extent_create(name, 0, (u_long)-1L, >>>> M_DEVBUF, NULL, 0, EX_NOWAIT | EX_FILLED); >>>> extent_free(sc->sc_memex, sc->sc_membase, >>>> sc->sc_memlimit - sc->sc_membase + 1, >>>> @@ -273,7 +273,7 @@ ppbattach(struct device *parent, struct >>>> blr = pci_conf_read(pc, pa->pa_tag, PPB_REG_PREFMEM); >>>> sc->sc_pmembase = (blr & 0x0000fff0) << 16; >>>> sc->sc_pmemlimit = (blr & 0xfff00000) | 0x000fffff; >>>> -#ifdef __LP64__ /* XXX because extents use long... */ >>>> +#ifdef __LP64__ >>>> blr = pci_conf_read(pc, pa->pa_tag, PPB_REG_PREFBASE_HI32); >>>> sc->sc_pmembase |= ((uint64_t)blr) << 32; >>>> blr = pci_conf_read(pc, pa->pa_tag, PPB_REG_PREFLIM_HI32); >>>> >>> >> > > > > -- > --------------------------------------------------------------------------------------------------------------------- > () ascii ribbon campaign - against html e-mail > /\ -- --------------------------------------------------------------------------------------------------------------------- () ascii ribbon campaign - against html e-mail /\
