Hello this should make speedstep work on nehalem cpu's (i3, i5, i7s) where
est uses acpi to get the available states. Please let me know of any
issues

gwk

Index: sys/arch/amd64/amd64/est.c
===================================================================
RCS file: /cvs/src/sys/arch/amd64/amd64/est.c,v
retrieving revision 1.20
diff -u -p -r1.20 est.c
--- sys/arch/amd64/amd64/est.c  4 Jun 2010 15:03:34 -0000       1.20
+++ sys/arch/amd64/amd64/est.c  27 Jun 2010 05:36:32 -0000
@@ -324,24 +324,19 @@ est_init(struct cpu_info *ci)
        if (setperf_prio > 3)
                return;
 
-       family = (ci->ci_signature >> 8) & 15;
-       if (family == 0xf) {
-               p4_get_bus_clock(ci);
-       } else if (family == 6) {
-               p3_get_bus_clock(ci);
-       }
-
-       if (bus_clock == 0) {
-               printf("%s: EST: PSS not yet available for this processor\n",
-                   cpu_device);
-               return;
-       }
 
 #if NACPICPU > 0
        est_fqlist = est_acpi_init();
 #endif
 
        if (est_fqlist == NULL) {
+               family = (ci->ci_signature >> 8) & 15;
+               if (family == 0xf) {
+                       p4_get_bus_clock(ci);
+               } else if (family == 6) {
+                       p3_get_bus_clock(ci);
+               }
+
                if (bus_clock == 0) {
                        printf("%s: EST: unknown system bus clock\n",
                            cpu_device);
@@ -464,9 +459,7 @@ est_setperf(int level)
                i = est_fqlist->n - 1;
        i = est_fqlist->n - 1 - i;
 
-       msr = rdmsr(MSR_PERF_CTL);
-       msr &= ~0xffffULL;
-       msr |= est_fqlist->table[i].ctrl;
+       msr = (rdmsr(MSR_PERF_CTL) & ~0xffff) | est_fqlist->table[i].ctrl;
 
        wrmsr(MSR_PERF_CTL, msr);
        cpuspeed = est_fqlist->table[i].mhz;
Index: sys/arch/i386/i386/est.c
===================================================================
RCS file: /cvs/src/sys/arch/i386/i386/est.c,v
retrieving revision 1.35
diff -u -p -r1.35 est.c
--- sys/arch/i386/i386/est.c    20 Apr 2010 22:05:41 -0000      1.35
+++ sys/arch/i386/i386/est.c    27 Jun 2010 05:36:32 -0000
@@ -1062,12 +1062,6 @@ est_init(const char *cpu_device, int ven
        if ((cpu_ecxfeature & CPUIDECX_EST) == 0)
                return;
 
-       if (bus_clock == 0) {
-               printf("%s: EST: PSS not yet available for this processor\n",
-                   cpu_device);
-               return;
-       }
-
        msr = rdmsr(MSR_PERF_STATUS);
        idhi = (msr >> 32) & 0xffff;
        idlo = (msr >> 48) & 0xffff;
@@ -1209,9 +1203,7 @@ est_setperf(int level)
                i = est_fqlist->n - 1;
        i = est_fqlist->n - 1 - i;
 
-       msr = rdmsr(MSR_PERF_CTL);
-       msr &= ~0xffffULL;
-       msr |= est_fqlist->table[i].ctrl;
+       msr = (rdmsr(MSR_PERF_CTL) & ~0xffff) | est_fqlist->table[i].ctrl;
 
        wrmsr(MSR_PERF_CTL, msr);
        cpuspeed = est_fqlist->table[i].mhz;

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