Author: hselasky
Date: Tue Mar 14 15:30:46 2017
New Revision: 315253
URL: https://svnweb.freebsd.org/changeset/base/315253
Log:
MFC r312424:
Fix problem with suspend and resume when using Skylake chipsets. Make
sure the XHCI controller is reset after halting it. The problem is
clearly a BIOS bug as the suspend and resume is failing without
loading the XHCI driver. The same happens when using Linux and the
XHCI driver is not loaded.
Submitted by: Yanko Yankulov <yanko.yanku...@gmail.com>
PR: 216261
Modified:
stable/9/sys/dev/usb/controller/xhci.c
stable/9/sys/dev/usb/controller/xhci.h
stable/9/sys/dev/usb/controller/xhci_pci.c
Directory Properties:
stable/9/sys/ (props changed)
Modified: stable/9/sys/dev/usb/controller/xhci.c
==============================================================================
--- stable/9/sys/dev/usb/controller/xhci.c Tue Mar 14 15:28:59 2017
(r315252)
+++ stable/9/sys/dev/usb/controller/xhci.c Tue Mar 14 15:30:46 2017
(r315253)
@@ -341,6 +341,7 @@ xhci_start_controller(struct xhci_softc
struct usb_page_search buf_res;
struct xhci_hw_root *phwr;
struct xhci_dev_ctx_addr *pdctxa;
+ usb_error_t err;
uint64_t addr;
uint32_t temp;
uint16_t i;
@@ -352,22 +353,9 @@ xhci_start_controller(struct xhci_softc
sc->sc_command_ccs = 1;
sc->sc_command_idx = 0;
- /* Reset controller */
- XWRITE4(sc, oper, XHCI_USBCMD, XHCI_CMD_HCRST);
-
- for (i = 0; i != 100; i++) {
- usb_pause_mtx(NULL, hz / 100);
- temp = (XREAD4(sc, oper, XHCI_USBCMD) & XHCI_CMD_HCRST) |
- (XREAD4(sc, oper, XHCI_USBSTS) & XHCI_STS_CNR);
- if (!temp)
- break;
- }
-
- if (temp) {
- device_printf(sc->sc_bus.parent, "Controller "
- "reset timeout.\n");
- return (USB_ERR_IOERROR);
- }
+ err = xhci_reset_controller(sc);
+ if (err)
+ return (err);
/* set up number of device slots */
DPRINTF("CONFIG=0x%08x -> 0x%08x\n",
@@ -515,6 +503,33 @@ xhci_halt_controller(struct xhci_softc *
}
usb_error_t
+xhci_reset_controller(struct xhci_softc *sc)
+{
+ uint32_t temp = 0;
+ uint16_t i;
+
+ DPRINTF("\n");
+
+ /* Reset controller */
+ XWRITE4(sc, oper, XHCI_USBCMD, XHCI_CMD_HCRST);
+
+ for (i = 0; i != 100; i++) {
+ usb_pause_mtx(NULL, hz / 100);
+ temp = (XREAD4(sc, oper, XHCI_USBCMD) & XHCI_CMD_HCRST) |
+ (XREAD4(sc, oper, XHCI_USBSTS) & XHCI_STS_CNR);
+ if (!temp)
+ break;
+ }
+
+ if (temp) {
+ device_printf(sc->sc_bus.parent, "Controller "
+ "reset timeout.\n");
+ return (USB_ERR_IOERROR);
+ }
+ return (0);
+}
+
+usb_error_t
xhci_init(struct xhci_softc *sc, device_t self, uint8_t dma32)
{
uint32_t temp;
@@ -666,10 +681,12 @@ xhci_set_hw_power_sleep(struct usb_bus *
case USB_HW_POWER_SUSPEND:
DPRINTF("Stopping the XHCI\n");
xhci_halt_controller(sc);
+ xhci_reset_controller(sc);
break;
case USB_HW_POWER_SHUTDOWN:
DPRINTF("Stopping the XHCI\n");
xhci_halt_controller(sc);
+ xhci_reset_controller(sc);
break;
case USB_HW_POWER_RESUME:
DPRINTF("Starting the XHCI\n");
Modified: stable/9/sys/dev/usb/controller/xhci.h
==============================================================================
--- stable/9/sys/dev/usb/controller/xhci.h Tue Mar 14 15:28:59 2017
(r315252)
+++ stable/9/sys/dev/usb/controller/xhci.h Tue Mar 14 15:30:46 2017
(r315253)
@@ -515,6 +515,7 @@ struct xhci_softc {
uint8_t xhci_use_polling(void);
usb_error_t xhci_halt_controller(struct xhci_softc *);
+usb_error_t xhci_reset_controller(struct xhci_softc *);
usb_error_t xhci_init(struct xhci_softc *, device_t, uint8_t);
usb_error_t xhci_start_controller(struct xhci_softc *);
void xhci_interrupt(struct xhci_softc *);
Modified: stable/9/sys/dev/usb/controller/xhci_pci.c
==============================================================================
--- stable/9/sys/dev/usb/controller/xhci_pci.c Tue Mar 14 15:28:59 2017
(r315252)
+++ stable/9/sys/dev/usb/controller/xhci_pci.c Tue Mar 14 15:30:46 2017
(r315253)
@@ -317,6 +317,7 @@ xhci_pci_detach(device_t self)
usb_callout_drain(&sc->sc_callout);
xhci_halt_controller(sc);
+ xhci_reset_controller(sc);
pci_disable_busmaster(self);
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