Author: hselasky
Date: Sat Jul 19 19:57:27 2014
New Revision: 268885
URL: http://svnweb.freebsd.org/changeset/base/268885
Log:
MFC r268735:
Improve support for Intel Lynx Point USB 3.0 controllers by using the
USB 2.0 port mask in addition to the USB 3.0 port mask. The hardware
does not always accept when writing -1U to the port switching
registers.
Modified:
stable/9/sys/dev/usb/controller/xhci_pci.c
Directory Properties:
stable/9/sys/ (props changed)
stable/9/sys/dev/ (props changed)
Modified: stable/9/sys/dev/usb/controller/xhci_pci.c
==============================================================================
--- stable/9/sys/dev/usb/controller/xhci_pci.c Sat Jul 19 19:56:23 2014
(r268884)
+++ stable/9/sys/dev/usb/controller/xhci_pci.c Sat Jul 19 19:57:27 2014
(r268885)
@@ -140,6 +140,8 @@ static int
xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear)
{
uint32_t temp;
+ uint32_t usb3_mask;
+ uint32_t usb2_mask;
temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) |
pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4);
@@ -148,10 +150,11 @@ xhci_pci_port_route(device_t self, uint3
temp &= ~clear;
/* Don't set bits which the hardware doesn't support */
- temp &= pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4);
+ usb3_mask = pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4);
+ usb2_mask = pci_read_config(self, PCI_XHCI_INTEL_USB2PRM, 4);
- pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp, 4);
- pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp, 4);
+ pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp & usb3_mask, 4);
+ pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp & usb2_mask, 4);
device_printf(self, "Port routing mask set to 0x%08x\n", temp);
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