Author: marius
Date: Thu Jun 27 09:23:53 2013
New Revision: 252300
URL: http://svnweb.freebsd.org/changeset/base/252300
Log:
MFC: r251715
All of Oxford/PLX OX16PCI954, OXm16PCI954 and OXu16PCI954 share the
exact same (subsystem) device and vendor IDs. However, the reference
design for the OXu16PCI954 uses a 14.7456 MHz clock (as does the EXSYS
EX-41098-2 equipped with these), while at least the OX16PCI954 defaults
to a 1.8432 MHz one. According to the datasheets of these chips, the
only difference in PCI configuration space is that OXu16PCI954 have
a revision ID of 1 while the other two are at 0. So employ the latter
for determining the default clock rates of this family.
Modified:
stable/9/sys/dev/puc/pucdata.c
Directory Properties:
stable/9/sys/ (props changed)
stable/9/sys/dev/ (props changed)
stable/9/sys/dev/puc/ (props changed)
Modified: stable/9/sys/dev/puc/pucdata.c
==============================================================================
--- stable/9/sys/dev/puc/pucdata.c Thu Jun 27 09:22:36 2013
(r252299)
+++ stable/9/sys/dev/puc/pucdata.c Thu Jun 27 09:23:53 2013
(r252300)
@@ -53,6 +53,7 @@ static puc_config_f puc_config_exar;
static puc_config_f puc_config_exar_pcie;
static puc_config_f puc_config_icbook;
static puc_config_f puc_config_moxa;
+static puc_config_f puc_config_oxford_pci954;
static puc_config_f puc_config_oxford_pcie;
static puc_config_f puc_config_quatech;
static puc_config_f puc_config_syba;
@@ -743,8 +744,9 @@ const struct puc_cfg puc_pci_devices[] =
{ 0x1415, 0x9501, 0xffff, 0,
"Oxford Semiconductor OX16PCI954 UARTs",
- DEFAULT_RCLK,
+ 0,
PUC_PORT_4S, 0x10, 0, 8,
+ .config_function = puc_config_oxford_pci954
},
{ 0x1415, 0x950a, 0x131f, 0x2030,
@@ -1516,6 +1518,28 @@ puc_config_timedia(struct puc_softc *sc,
}
static int
+puc_config_oxford_pci954(struct puc_softc *sc, enum puc_cfg_cmd cmd,
+ int port __unused, intptr_t *res)
+{
+
+ switch (cmd) {
+ case PUC_CFG_GET_CLOCK:
+ /*
+ * OXu16PCI954 use a 14.7456 MHz clock by default while
+ * OX16PCI954 and OXm16PCI954 employ a 1.8432 MHz one.
+ */
+ if (pci_get_revid(sc->sc_dev) == 1)
+ *res = DEFAULT_RCLK * 8;
+ else
+ *res = DEFAULT_RCLK;
+ return (0);
+ default:
+ break;
+ }
+ return (ENXIO);
+}
+
+static int
puc_config_oxford_pcie(struct puc_softc *sc, enum puc_cfg_cmd cmd, int port,
intptr_t *res)
{
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