Author: kib
Date: Wed Nov 8 11:39:42 2017
New Revision: 325543
URL: https://svnweb.freebsd.org/changeset/base/325543
Log:
MFC r325270:
Consistently ensure that we do not load MXCSR with reserved bits set.
Modified:
stable/10/sys/amd64/amd64/fpu.c
stable/10/sys/amd64/amd64/machdep.c
stable/10/sys/i386/i386/machdep.c
stable/10/sys/i386/isa/npx.c
Directory Properties:
stable/10/ (props changed)
Modified: stable/10/sys/amd64/amd64/fpu.c
==============================================================================
--- stable/10/sys/amd64/amd64/fpu.c Wed Nov 8 11:25:19 2017
(r325542)
+++ stable/10/sys/amd64/amd64/fpu.c Wed Nov 8 11:39:42 2017
(r325543)
@@ -804,6 +804,7 @@ fpusetregs(struct thread *td, struct savefpu *addr, ch
struct pcb *pcb;
int error;
+ addr->sv_env.en_mxcsr &= cpu_mxcsr_mask;
pcb = td->td_pcb;
critical_enter();
if (td == PCPU_GET(fpcurthread) && PCB_USER_FPU(pcb)) {
Modified: stable/10/sys/amd64/amd64/machdep.c
==============================================================================
--- stable/10/sys/amd64/amd64/machdep.c Wed Nov 8 11:25:19 2017
(r325542)
+++ stable/10/sys/amd64/amd64/machdep.c Wed Nov 8 11:39:42 2017
(r325543)
@@ -2529,7 +2529,6 @@ static int
set_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpustate,
size_t xfpustate_len)
{
- struct savefpu *fpstate;
int error;
if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
@@ -2542,9 +2541,8 @@ set_fpcontext(struct thread *td, mcontext_t *mcp, char
error = 0;
} else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
- fpstate = (struct savefpu *)&mcp->mc_fpstate;
- fpstate->sv_env.en_mxcsr &= cpu_mxcsr_mask;
- error = fpusetregs(td, fpstate, xfpustate, xfpustate_len);
+ error = fpusetregs(td, (struct savefpu *)&mcp->mc_fpstate,
+ xfpustate, xfpustate_len);
} else
return (EINVAL);
return (error);
Modified: stable/10/sys/i386/i386/machdep.c
==============================================================================
--- stable/10/sys/i386/i386/machdep.c Wed Nov 8 11:25:19 2017
(r325542)
+++ stable/10/sys/i386/i386/machdep.c Wed Nov 8 11:39:42 2017
(r325543)
@@ -3932,7 +3932,6 @@ static int
set_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpustate,
size_t xfpustate_len)
{
- union savefpu *fpstate;
int error;
if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
@@ -3947,12 +3946,8 @@ set_fpcontext(struct thread *td, mcontext_t *mcp, char
} else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
#ifdef DEV_NPX
- fpstate = (union savefpu *)&mcp->mc_fpstate;
-#ifdef CPU_ENABLE_SSE
- if (cpu_fxsr)
- fpstate->sv_xmm.sv_env.en_mxcsr &= cpu_mxcsr_mask;
-#endif
- error = npxsetregs(td, fpstate, xfpustate, xfpustate_len);
+ error = npxsetregs(td, (union savefpu *)&mcp->mc_fpstate,
+ xfpustate, xfpustate_len);
#else
error = EINVAL;
#endif
Modified: stable/10/sys/i386/isa/npx.c
==============================================================================
--- stable/10/sys/i386/isa/npx.c Wed Nov 8 11:25:19 2017
(r325542)
+++ stable/10/sys/i386/isa/npx.c Wed Nov 8 11:39:42 2017
(r325543)
@@ -1124,6 +1124,10 @@ npxsetregs(struct thread *td, union savefpu *addr, cha
if (!hw_float)
return (ENXIO);
+#ifdef CPU_ENABLE_SSE
+ if (cpu_fxsr)
+ addr->sv_xmm.sv_env.en_mxcsr &= cpu_mxcsr_mask;
+#endif
pcb = td->td_pcb;
critical_enter();
if (td == PCPU_GET(fpcurthread) && PCB_USER_FPU(pcb)) {
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