Author: mav
Date: Thu Aug 18 10:53:03 2016
New Revision: 304399
URL: https://svnweb.freebsd.org/changeset/base/304399
Log:
MFC r302531: Revert odd change, setting limit registers before base.
I don't know what errata is mentioned there, I was unable to find it, but
setting limit before the base simply does not work at all. According to
specification attempt to set limit out of the present window range resets
it to zero, effectively disabling it. And that is what I see in practice.
Fixing this properly disables access for remote side to our memory until
respective xlat is negotiated and set. As I see, Linux does the same.
Modified:
stable/10/sys/dev/ntb/ntb_hw/ntb_hw.c
Directory Properties:
stable/10/ (props changed)
Modified: stable/10/sys/dev/ntb/ntb_hw/ntb_hw.c
==============================================================================
--- stable/10/sys/dev/ntb/ntb_hw/ntb_hw.c Thu Aug 18 10:52:29 2016
(r304398)
+++ stable/10/sys/dev/ntb/ntb_hw/ntb_hw.c Thu Aug 18 10:53:03 2016
(r304399)
@@ -1715,26 +1715,22 @@ xeon_set_sbar_base_and_limit(struct ntb_
bar_addr = 0;
}
- /*
- * Set limit registers first to avoid an errata where setting the base
- * registers locks the limit registers.
- */
if (!bar_is_64bit(ntb, idx)) {
- ntb_reg_write(4, lmt_reg, bar_addr);
- reg_val = ntb_reg_read(4, lmt_reg);
- (void)reg_val;
-
ntb_reg_write(4, base_reg, bar_addr);
reg_val = ntb_reg_read(4, base_reg);
(void)reg_val;
- } else {
- ntb_reg_write(8, lmt_reg, bar_addr);
- reg_val = ntb_reg_read(8, lmt_reg);
- (void)reg_val;
+ ntb_reg_write(4, lmt_reg, bar_addr);
+ reg_val = ntb_reg_read(4, lmt_reg);
+ (void)reg_val;
+ } else {
ntb_reg_write(8, base_reg, bar_addr);
reg_val = ntb_reg_read(8, base_reg);
(void)reg_val;
+
+ ntb_reg_write(8, lmt_reg, bar_addr);
+ reg_val = ntb_reg_read(8, lmt_reg);
+ (void)reg_val;
}
}
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