> Author: markj > Date: Tue May 22 15:38:51 2018 > New Revision: 334050 > URL: https://svnweb.freebsd.org/changeset/base/334050 > > Log: > Flush caches before initiating a microcode update on Intel CPUs. > > This apparently works around issues with updates of certain Broadwell > CPUs. > > Reviewed by: emaste, kib, sbruno > MFC after: 3 days > Differential Revision: https://reviews.freebsd.org/D15520 > > Modified: > head/sys/dev/cpuctl/cpuctl.c > > Modified: head/sys/dev/cpuctl/cpuctl.c > ============================================================================== > --- head/sys/dev/cpuctl/cpuctl.c Tue May 22 15:35:38 2018 > (r334049) > +++ head/sys/dev/cpuctl/cpuctl.c Tue May 22 15:38:51 2018 > (r334050) > @@ -367,8 +367,10 @@ update_intel(int cpu, cpuctl_update_args_t *args, stru > rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */ > > /* > - * Perform update. > + * Perform update. Flush caches first to work around seeingly
Did you mean seemingly? > + * undocumented errata applying to some Broadwell CPUs. > */ > + wbinvd(); > wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr)); > wrmsr_safe(MSR_BIOS_SIGN, 0); > > > -- Rod Grimes rgri...@freebsd.org _______________________________________________ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
