Author: brooks Date: Thu Apr 19 20:36:15 2018 New Revision: 332792 URL: https://svnweb.freebsd.org/changeset/base/332792
Log: Replace SOFTFLOAT with __riscv_float_abi_*. With SOFTFLOAT, libc and libm were built correctly, but any program including fenv.h itself assumed it was on a hardfloat systen and emitted inline fpu instructions for fedisableexcept() and friends. Unlike r315424 which did this for MIPS, I've used riscv_float_abi_soft and riscv_float_abi_double macros as appropriate rather than using __riscv_float_abi_soft exclusively. This ensures that attempts to use an unsupported hardfloat ABI will fail. Reviewed by: br Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D10039 Modified: head/lib/libc/riscv/Makefile.inc head/lib/libc/riscv/gen/_setjmp.S head/lib/libc/riscv/gen/fabs.S head/lib/libc/riscv/gen/flt_rounds.c head/lib/libc/riscv/gen/setjmp.S head/lib/msun/riscv/Makefile.inc head/lib/msun/riscv/fenv.c head/lib/msun/riscv/fenv.h Modified: head/lib/libc/riscv/Makefile.inc ============================================================================== --- head/lib/libc/riscv/Makefile.inc Thu Apr 19 20:31:52 2018 (r332791) +++ head/lib/libc/riscv/Makefile.inc Thu Apr 19 20:36:15 2018 (r332792) @@ -3,10 +3,6 @@ # Machine dependent definitions for the RISC-V architecture. # -.if ${MACHINE_ARCH:Mriscv*sf} != "" -CFLAGS+=-DSOFTFLOAT -.endif - # Long double is quad precision GDTOASRCS+=strtorQ.c SRCS+=machdep_ldisQ.c Modified: head/lib/libc/riscv/gen/_setjmp.S ============================================================================== --- head/lib/libc/riscv/gen/_setjmp.S Thu Apr 19 20:31:52 2018 (r332791) +++ head/lib/libc/riscv/gen/_setjmp.S Thu Apr 19 20:36:15 2018 (r332792) @@ -61,7 +61,7 @@ ENTRY(_setjmp) sd ra, (12 * 8)(a0) addi a0, a0, (13 * 8) -#if !defined(_STANDALONE) && !defined(SOFTFLOAT) +#if !defined(_STANDALONE) && defined(__riscv_float_abi_double) /* Store the fpe registers */ fsd fs0, (0 * 16)(a0) fsd fs1, (1 * 16)(a0) @@ -114,7 +114,7 @@ ENTRY(_longjmp) ld ra, (12 * 8)(a0) addi a0, a0, (13 * 8) -#if !defined(_STANDALONE) && !defined(SOFTFLOAT) +#if !defined(_STANDALONE) && defined(__riscv_float_abi_double) /* Restore the fpe registers */ fld fs0, (0 * 16)(a0) fld fs1, (1 * 16)(a0) Modified: head/lib/libc/riscv/gen/fabs.S ============================================================================== --- head/lib/libc/riscv/gen/fabs.S Thu Apr 19 20:31:52 2018 (r332791) +++ head/lib/libc/riscv/gen/fabs.S Thu Apr 19 20:36:15 2018 (r332792) @@ -35,7 +35,7 @@ #include <machine/asm.h> __FBSDID("$FreeBSD$"); -#ifndef SOFTFLOAT +#ifdef __riscv_float_abi_double ENTRY(fabs) fabs.d fa0, fa0 ret Modified: head/lib/libc/riscv/gen/flt_rounds.c ============================================================================== --- head/lib/libc/riscv/gen/flt_rounds.c Thu Apr 19 20:31:52 2018 (r332791) +++ head/lib/libc/riscv/gen/flt_rounds.c Thu Apr 19 20:36:15 2018 (r332792) @@ -40,7 +40,7 @@ __FBSDID("$FreeBSD$"); #include <fenv.h> #include <float.h> -#ifdef SOFTFLOAT +#ifdef __riscv_float_abi_soft #include "softfloat-for-gcc.h" #include "milieu.h" #include "softfloat.h" @@ -51,7 +51,7 @@ __flt_rounds(void) { uint64_t mode; -#ifdef SOFTFLOAT +#ifdef __riscv_float_abi_soft mode = __softfloat_float_rounding_mode; #else __asm __volatile("csrr %0, fcsr" : "=r" (mode)); Modified: head/lib/libc/riscv/gen/setjmp.S ============================================================================== --- head/lib/libc/riscv/gen/setjmp.S Thu Apr 19 20:31:52 2018 (r332791) +++ head/lib/libc/riscv/gen/setjmp.S Thu Apr 19 20:36:15 2018 (r332792) @@ -75,7 +75,7 @@ ENTRY(setjmp) sd ra, (12 * 8)(a0) addi a0, a0, (13 * 8) -#ifndef SOFTFLOAT +#ifdef __riscv_float_abi_double /* Store the fpe registers */ fsd fs0, (0 * 16)(a0) fsd fs1, (1 * 16)(a0) @@ -144,7 +144,7 @@ ENTRY(longjmp) ld ra, (12 * 8)(a0) addi a0, a0, (13 * 8) -#ifndef SOFTFLOAT +#ifdef __riscv_float_abi_double /* Restore the fpe registers */ fld fs0, (0 * 16)(a0) fld fs1, (1 * 16)(a0) Modified: head/lib/msun/riscv/Makefile.inc ============================================================================== --- head/lib/msun/riscv/Makefile.inc Thu Apr 19 20:31:52 2018 (r332791) +++ head/lib/msun/riscv/Makefile.inc Thu Apr 19 20:36:15 2018 (r332792) @@ -1,8 +1,4 @@ # $FreeBSD$ -.if ${MACHINE_ARCH:Mriscv*sf} != "" -CFLAGS+=-DSOFTFLOAT -.endif - LDBL_PREC = 113 SYM_MAPS += ${.CURDIR}/riscv/Symbol.map Modified: head/lib/msun/riscv/fenv.c ============================================================================== --- head/lib/msun/riscv/fenv.c Thu Apr 19 20:31:52 2018 (r332791) +++ head/lib/msun/riscv/fenv.c Thu Apr 19 20:36:15 2018 (r332792) @@ -39,7 +39,7 @@ */ const fenv_t __fe_dfl_env = 0; -#ifdef SOFTFLOAT +#ifdef __riscv_float_abi_soft #define __set_env(env, flags, mask, rnd) env = ((flags) | (rnd) << 5) #define __env_flags(env) ((env) & FE_ALL_EXCEPT) #define __env_mask(env) (0) /* No exception traps. */ Modified: head/lib/msun/riscv/fenv.h ============================================================================== --- head/lib/msun/riscv/fenv.h Thu Apr 19 20:31:52 2018 (r332791) +++ head/lib/msun/riscv/fenv.h Thu Apr 19 20:36:15 2018 (r332792) @@ -73,12 +73,20 @@ __BEGIN_DECLS extern const fenv_t __fe_dfl_env; #define FE_DFL_ENV (&__fe_dfl_env) -#ifndef SOFTFLOAT +#if !defined(__riscv_float_abi_soft) && !defined(__riscv_float_abi_double) +#if defined(__riscv_float_abi_single) +#error single precision floating point ABI not supported +#else +#error compiler did not set soft/hard float macros +#endif +#endif + +#ifndef __riscv_float_abi_soft #define __rfs(__fcsr) __asm __volatile("csrr %0, fcsr" : "=r" (__fcsr)) #define __wfs(__fcsr) __asm __volatile("csrw fcsr, %0" :: "r" (__fcsr)) #endif -#ifdef SOFTFLOAT +#ifdef __riscv_float_abi_soft int feclearexcept(int __excepts); int fegetexceptflag(fexcept_t *__flagp, int __excepts); int fesetexceptflag(const fexcept_t *__flagp, int __excepts); @@ -206,13 +214,13 @@ feupdateenv(const fenv_t *__envp) return (0); } -#endif /* !SOFTFLOAT */ +#endif /* !__riscv_float_abi_soft */ #if __BSD_VISIBLE /* We currently provide no external definitions of the functions below. */ -#ifdef SOFTFLOAT +#ifdef __riscv_float_abi_soft int feenableexcept(int __mask); int fedisableexcept(int __mask); int fegetexcept(void); @@ -243,7 +251,7 @@ fegetexcept(void) return (0); } -#endif /* !SOFTFLOAT */ +#endif /* !__riscv_float_abi_soft */ #endif /* __BSD_VISIBLE */ _______________________________________________ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
