Author: dim
Date: Tue Aug 29 21:45:00 2017
New Revision: 323001
URL: https://svnweb.freebsd.org/changeset/base/323001
Log:
In compiler-rt, a few assembler implementations for i386 floating point
conversion functions use SSE2 instructions, but these are not guarded by
#ifdef __SSE2__, and there is no implementation using general purpose
registers. For these functions, use the generic C variants instead,
otherwise they will cause SIGILL on older processors.
Reported by: bs...@phoe.frmug.org
PR: 221733
MFC after: 1 week
Modified:
head/lib/libcompiler_rt/Makefile.inc
Modified: head/lib/libcompiler_rt/Makefile.inc
==============================================================================
--- head/lib/libcompiler_rt/Makefile.inc Tue Aug 29 21:04:29 2017
(r323000)
+++ head/lib/libcompiler_rt/Makefile.inc Tue Aug 29 21:45:00 2017
(r323001)
@@ -57,18 +57,12 @@ SRCF+= fixunsxfsi
SRCF+= fixunsxfti
SRCF+= fixxfdi
SRCF+= fixxfti
-SRCF+= floatdidf
-SRCF+= floatdisf
SRCF+= floatditf
-SRCF+= floatdixf
SRCF+= floatsitf
SRCF+= floattidf
SRCF+= floattisf
SRCF+= floattixf
-SRCF+= floatundidf
-SRCF+= floatundisf
SRCF+= floatunditf
-SRCF+= floatundixf
SRCF+= floatunsidf
SRCF+= floatunsisf
SRCF+= floatuntidf
@@ -127,6 +121,23 @@ SRCF+= udivti3
SRCF+= umoddi3
SRCF+= umodsi3
SRCF+= umodti3
+
+# Avoid using SSE2 instructions on i386.
+.if ${MACHINE_CPUARCH} == "i386"
+SRCS+= floatdidf.c
+SRCS+= floatdisf.c
+SRCS+= floatdixf.c
+SRCS+= floatundidf.c
+SRCS+= floatundisf.c
+SRCS+= floatundixf.c
+.else
+SRCF+= floatdidf
+SRCF+= floatdisf
+SRCF+= floatdixf
+SRCF+= floatundidf
+SRCF+= floatundisf
+SRCF+= floatundixf
+.endif
# __cpu_model support, only used on x86
.if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386"
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