On 2017-Feb-15, at 1:39 PM, Oliver Pinter <oliver.pin...@hardenedbsd.org> wrote:
> On 2/15/17, Mark Millard <mar...@dsl-only.net> wrote: >>> Author: andrew >>> Date: Wed Feb 15 14:56:47 2017 >>> New Revision: 313772 >>> URL: >>> https://svnweb.freebsd.org/changeset/base/313772 >>> >>> Log: >>> Load the new sp_el0 with interrupts disabled in fork_trampoline. If an >>> interrupt arrives in fork_trampoline after sp_el0 was written we may >>> then >>> switch to a new thread, enter userland so change this stack pointer, >>> then >>> return to this code with the wrong value. This fixes this case by >>> moving >>> the load of sp_el0 until after interrupts have been disabled. >> >> https://svnweb.freebsd.org/base/stable/11/sys/arm64/arm64/swtch.S?revision=302408&view=markup >> >> shows stable/11 has the same issue. >> >> Is this to be MFC'd at some point? >> >> >> stable/10 seems to have a different code structure: >> >> https://svnweb.freebsd.org/base/stable/10/sys/amd64/amd64/ > > This is x86-64 aka amd64 in FreeBSD, in 10-STABLE only 32 bit ARM > support exists, so there isn't arm64. Clearly I was somewhat distracted and careless when I looked at stable/10. Sorry for the noise in that part. Still the stable/11 part does apply: at least I got something right. >> >> . . . === Mark Millard markmi at dsl-only.net _______________________________________________ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
