Author: ian
Date: Thu Apr 7 17:45:01 2016
New Revision: 297680
URL: https://svnweb.freebsd.org/changeset/base/297680
Log:
Comestic changes; when INTRNG support was added, some functions became
oddly separated from related functionality. This just moves some blocks
of code around so that setup_intr and teardown_intr are near each other
again, and likewise for enable/disable_intr. No functional changes.
Modified:
head/sys/arm/freescale/imx/imx_gpio.c
Modified: head/sys/arm/freescale/imx/imx_gpio.c
==============================================================================
--- head/sys/arm/freescale/imx/imx_gpio.c Thu Apr 7 17:15:16 2016
(r297679)
+++ head/sys/arm/freescale/imx/imx_gpio.c Thu Apr 7 17:45:01 2016
(r297680)
@@ -157,45 +157,6 @@ static int imx51_gpio_pin_toggle(device_
#ifdef ARM_INTRNG
static int
-gpio_pic_teardown_intr(device_t dev, struct intr_irqsrc *isrc,
- struct resource *res, struct intr_map_data *data)
-{
- struct imx51_gpio_softc *sc;
- struct gpio_irqsrc *gi;
-
- sc = device_get_softc(dev);
- if (isrc->isrc_handlers == 0) {
- gi = (struct gpio_irqsrc *)isrc;
- gi->gi_pol = INTR_POLARITY_CONFORM;
- gi->gi_trig = INTR_TRIGGER_CONFORM;
-
- // XXX Not sure this is necessary
- mtx_lock_spin(&sc->sc_mtx);
- CLEAR4(sc, IMX_GPIO_IMR_REG, (1U << gi->gi_irq));
- WRITE4(sc, IMX_GPIO_ISR_REG, (1U << gi->gi_irq));
- mtx_unlock_spin(&sc->sc_mtx);
- }
- return (0);
-}
-
-/*
- * this is mask_intr
- */
-static void
-gpio_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
-{
- struct imx51_gpio_softc *sc;
- u_int irq;
-
- sc = device_get_softc(dev);
- irq = ((struct gpio_irqsrc *)isrc)->gi_irq;
-
- mtx_lock_spin(&sc->sc_mtx);
- CLEAR4(sc, IMX_GPIO_IMR_REG, (1U << irq));
- mtx_unlock_spin(&sc->sc_mtx);
-}
-
-static int
gpio_pic_map_fdt(device_t dev, u_int ncells, pcell_t *cells, u_int *irqp,
enum intr_polarity *polp, enum intr_trigger *trigp)
{
@@ -279,6 +240,28 @@ gpio_pic_map_intr(device_t dev, struct i
}
static int
+gpio_pic_teardown_intr(device_t dev, struct intr_irqsrc *isrc,
+ struct resource *res, struct intr_map_data *data)
+{
+ struct imx51_gpio_softc *sc;
+ struct gpio_irqsrc *gi;
+
+ sc = device_get_softc(dev);
+ if (isrc->isrc_handlers == 0) {
+ gi = (struct gpio_irqsrc *)isrc;
+ gi->gi_pol = INTR_POLARITY_CONFORM;
+ gi->gi_trig = INTR_TRIGGER_CONFORM;
+
+ // XXX Not sure this is necessary
+ mtx_lock_spin(&sc->sc_mtx);
+ CLEAR4(sc, IMX_GPIO_IMR_REG, (1U << gi->gi_irq));
+ WRITE4(sc, IMX_GPIO_ISR_REG, (1U << gi->gi_irq));
+ mtx_unlock_spin(&sc->sc_mtx);
+ }
+ return (0);
+}
+
+static int
gpio_pic_setup_intr(device_t dev, struct intr_irqsrc *isrc,
struct resource *res, struct intr_map_data *data)
{
@@ -345,6 +328,23 @@ gpio_pic_setup_intr(device_t dev, struct
}
/*
+ * this is mask_intr
+ */
+static void
+gpio_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
+{
+ struct imx51_gpio_softc *sc;
+ u_int irq;
+
+ sc = device_get_softc(dev);
+ irq = ((struct gpio_irqsrc *)isrc)->gi_irq;
+
+ mtx_lock_spin(&sc->sc_mtx);
+ CLEAR4(sc, IMX_GPIO_IMR_REG, (1U << irq));
+ mtx_unlock_spin(&sc->sc_mtx);
+}
+
+/*
* this is unmask_intr
*/
static void
@@ -417,7 +417,7 @@ gpio_pic_filter(void *arg)
}
/*
- * register our isrcs into intrng to make it known about them.
+ * Initialize our isrcs and register them with intrng.
*/
static int
gpio_pic_register_isrcs(struct imx51_gpio_softc *sc)
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