Author: zbb
Date: Tue Mar 17 18:59:47 2015
New Revision: 280184
URL: https://svnweb.freebsd.org/changeset/base/280184
Log:
Introduce Annapurna Labs AHCI support
Overview:
* implemented quirk for forcing SATA interface enable
* restore value to status register - this enables link autonegotiation
Modifications:
* devid:vendorid field
* quirk for forcing PI setting (BIOS is doing that on PC-like systems)
* write to capabilites field to enable phy link initialization
Submitted by: Wojciech Macek <w...@semihalf.com>
Reviewed by: imp, mav
Obtained from: Semihalf
Modified:
head/sys/dev/ahci/ahci.c
head/sys/dev/ahci/ahci.h
head/sys/dev/ahci/ahci_pci.c
Modified: head/sys/dev/ahci/ahci.c
==============================================================================
--- head/sys/dev/ahci/ahci.c Tue Mar 17 18:50:33 2015 (r280183)
+++ head/sys/dev/ahci/ahci.c Tue Mar 17 18:59:47 2015 (r280184)
@@ -146,6 +146,18 @@ ahci_ctlr_reset(device_t dev)
}
/* Reenable AHCI mode */
ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE);
+
+ if (ctlr->quirks & AHCI_Q_RESTORE_CAP) {
+ /*
+ * Restore capability field.
+ * This is write to a read-only register to restore its state.
+ * On fully standard-compliant hardware this is not needed and
+ * this operation shall not take place. See ahci_pci.c for
+ * platforms using this quirk.
+ */
+ ATA_OUTL(ctlr->r_mem, AHCI_CAP, ctlr->caps);
+ }
+
return (0);
}
@@ -185,6 +197,22 @@ ahci_attach(device_t dev)
ctlr->caps2 = ATA_INL(ctlr->r_mem, AHCI_CAP2);
if (ctlr->caps & AHCI_CAP_EMS)
ctlr->capsem = ATA_INL(ctlr->r_mem, AHCI_EM_CTL);
+
+ if (ctlr->quirks & AHCI_Q_FORCE_PI) {
+ /*
+ * Enable ports.
+ * The spec says that BIOS sets up bits corresponding to
+ * available ports. On platforms where this information
+ * is missing, the driver can define available ports on its own.
+ */
+ int nports = (ctlr->caps & AHCI_CAP_NPMASK) + 1;
+ int nmask = (1 << nports) - 1;
+
+ ATA_OUTL(ctlr->r_mem, AHCI_PI, nmask);
+ device_printf(dev, "Forcing PI to %d ports (mask = %x)\n",
+ nports, nmask);
+ }
+
ctlr->ichannels = ATA_INL(ctlr->r_mem, AHCI_PI);
/* Identify and set separate quirks for HBA and RAID f/w Marvells. */
Modified: head/sys/dev/ahci/ahci.h
==============================================================================
--- head/sys/dev/ahci/ahci.h Tue Mar 17 18:50:33 2015 (r280183)
+++ head/sys/dev/ahci/ahci.h Tue Mar 17 18:59:47 2015 (r280184)
@@ -574,6 +574,8 @@ enum ahci_err_type {
#define AHCI_Q_SATA1_UNIT0 0x00008000 /* need better method for this
*/
#define AHCI_Q_ABAR0 0x00010000
#define AHCI_Q_1MSI 0x00020000
+#define AHCI_Q_FORCE_PI 0x00040000
+#define AHCI_Q_RESTORE_CAP 0x00080000
#define AHCI_Q_BIT_STRING \
"\021" \
@@ -594,7 +596,9 @@ enum ahci_err_type {
"\017MAXIO_64K" \
"\020SATA1_UNIT0" \
"\021ABAR0" \
- "\0221MSI"
+ "\0221MSI" \
+ "\022FORCE_PI" \
+ "\023RESTORE_CAP"
int ahci_attach(device_t dev);
int ahci_detach(device_t dev);
Modified: head/sys/dev/ahci/ahci_pci.c
==============================================================================
--- head/sys/dev/ahci/ahci_pci.c Tue Mar 17 18:50:33 2015
(r280183)
+++ head/sys/dev/ahci/ahci_pci.c Tue Mar 17 18:59:47 2015
(r280184)
@@ -293,6 +293,7 @@ static const struct {
{0x11851039, 0x00, "SiS 968", 0},
{0x01861039, 0x00, "SiS 968", 0},
{0xa01c177d, 0x00, "ThunderX", AHCI_Q_ABAR0|AHCI_Q_1MSI},
+ {0x00311c36, 0x00, "Annapurna",
AHCI_Q_FORCE_PI|AHCI_Q_RESTORE_CAP},
{0x00000000, 0x00, NULL, 0}
};
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