Author: jchandra
Date: Fri Feb 27 23:33:53 2015
New Revision: 279384
URL: https://svnweb.freebsd.org/changeset/base/279384
Log:
Add subclass of simplebus for Broadcom XLP
This will override the resource allocation of simplebus, and also
merge the resource allocation code which was in xlp_pci.c.
With this change the SoC devices that does not have proper PCI
resources will be on the FDT simplebus. We can remove
sys/mips/nlm/dev/cfi_pci_xlp.c and sys/mips/nlm/dev/uart_pci_xlp.c
Added:
head/sys/mips/nlm/xlp_simplebus.c (contents, props changed)
Deleted:
head/sys/mips/nlm/dev/cfi_pci_xlp.c
head/sys/mips/nlm/dev/uart_pci_xlp.c
Modified:
head/sys/mips/nlm/files.xlp
head/sys/mips/nlm/xlp_pci.c
Modified: head/sys/mips/nlm/files.xlp
==============================================================================
--- head/sys/mips/nlm/files.xlp Fri Feb 27 23:14:08 2015 (r279383)
+++ head/sys/mips/nlm/files.xlp Fri Feb 27 23:33:53 2015 (r279384)
@@ -11,14 +11,11 @@ mips/nlm/bus_space_rmi_pci.c standard
mips/nlm/mpreset.S standard
mips/nlm/board_eeprom.c standard
mips/nlm/board_cpld.c standard
+mips/nlm/xlp_simplebus.c optional fdt
mips/nlm/xlp_pci.c optional pci
mips/nlm/uart_cpu_xlp.c optional uart
mips/nlm/usb_init.c optional usb
#
-# Simple SoC devices
-mips/nlm/dev/uart_pci_xlp.c optional uart
-mips/nlm/dev/cfi_pci_xlp.c optional cfi
-#
# Network driver and micro-core code
mips/nlm/dev/net/nae.c optional xlpge
mips/nlm/dev/net/mdio.c optional xlpge
Modified: head/sys/mips/nlm/xlp_pci.c
==============================================================================
--- head/sys/mips/nlm/xlp_pci.c Fri Feb 27 23:14:08 2015 (r279383)
+++ head/sys/mips/nlm/xlp_pci.c Fri Feb 27 23:33:53 2015 (r279384)
@@ -52,6 +52,7 @@ __FBSDID("$FreeBSD$");
#include <dev/uart/uart_bus.h>
#include <dev/uart/uart_cpu.h>
+#include <dev/ofw/openfirm.h>
#include <dev/ofw/ofw_bus.h>
#include <dev/ofw/ofw_bus_subr.h>
@@ -74,169 +75,21 @@ __FBSDID("$FreeBSD$");
#include "pcib_if.h"
#include "pci_if.h"
-#define EMUL_MEM_START 0x16000000UL
-#define EMUL_MEM_END 0x18ffffffUL
-
-/* Override PCI a bit for SoC devices */
-
-enum {
- INTERNAL_DEV = 0x1, /* internal device, skip on enumeration */
- MEM_RES_EMUL = 0x2, /* no MEM or IO bar, custom res alloc */
- SHARED_IRQ = 0x4,
- DEV_MMIO32 = 0x8, /* byte access not allowed to mmio */
-};
-
-struct xlp_devinfo {
- struct pci_devinfo pcidev;
- int irq;
- int flags;
- u_long mem_res_start;
-};
-
-static struct resource *
-xlp_pci_alloc_resource(device_t bus, device_t child, int type, int *rid,
- u_long start, u_long end, u_long count, u_int flags)
-{
- struct resource *r;
- struct xlp_devinfo *xlp_devinfo;
- int busno;
-
- /*
- * Do custom allocation for MEMORY resource for SoC device if
- * MEM_RES_EMUL flag is set
- */
- busno = pci_get_bus(child);
- if ((type == SYS_RES_MEMORY || type == SYS_RES_IOPORT) && busno == 0) {
- xlp_devinfo = (struct xlp_devinfo *)device_get_ivars(child);
- if ((xlp_devinfo->flags & MEM_RES_EMUL) != 0) {
- /* no emulation for IO ports */
- if (type == SYS_RES_IOPORT)
- return (NULL);
-
- start = xlp_devinfo->mem_res_start;
- count = XLP_PCIE_CFG_SIZE - XLP_IO_PCI_HDRSZ;
-
- /* MMC needs to 2 slots with rids 16 and 20 and a
- * fixup for size */
- if (pci_get_device(child) == PCI_DEVICE_ID_NLM_MMC) {
- count = 0x100;
- if (*rid == 16)
- ; /* first slot already setup */
- else if (*rid == 20)
- start += 0x100; /* second slot */
- else
- return (NULL);
- }
-
- end = start + count - 1;
- r = BUS_ALLOC_RESOURCE(device_get_parent(bus), child,
- type, rid, start, end, count, flags);
- if (r == NULL)
- return (NULL);
- if ((xlp_devinfo->flags & DEV_MMIO32) != 0)
- rman_set_bustag(r, rmi_uart_bus_space);
- return (r);
- }
- }
-
- /* Not custom alloc, use PCI code */
- return (pci_alloc_resource(bus, child, type, rid, start, end, count,
- flags));
-}
-
static int
-xlp_pci_release_resource(device_t bus, device_t child, int type, int rid,
- struct resource *r)
-{
- u_long start;
-
- /* If custom alloc, handle that */
- start = rman_get_start(r);
- if (type == SYS_RES_MEMORY && pci_get_bus(child) == 0 &&
- start >= EMUL_MEM_START && start <= EMUL_MEM_END)
- return (BUS_RELEASE_RESOURCE(device_get_parent(bus), child,
- type, rid, r));
-
- /* use default PCI function */
- return (bus_generic_rl_release_resource(bus, child, type, rid, r));
-}
-
-static void
-xlp_add_soc_child(device_t pcib, device_t dev, int b, int s, int f)
+xlp_pci_attach(device_t dev)
{
struct pci_devinfo *dinfo;
- struct xlp_devinfo *xlp_dinfo;
- int domain, node, irq, devoffset, flags;
+ device_t pcib;
+ int maxslots, s, f, pcifunchigh, irq;
+ int busno, node, devoffset;
uint16_t devid;
-
- domain = pcib_get_domain(dev);
- node = s / 8;
- devoffset = XLP_HDR_OFFSET(node, 0, s % 8, f);
- if (!nlm_dev_exists(devoffset))
- return;
-
- /* Find if there is a desc for the SoC device */
- devid = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_DEVICE, 2);
- flags = 0;
- irq = 0;
- switch (devid) {
- case PCI_DEVICE_ID_NLM_UART:
- irq = PIC_UART_0_IRQ + f;
- flags = MEM_RES_EMUL | DEV_MMIO32;
- break;
- case PCI_DEVICE_ID_NLM_I2C:
- flags = MEM_RES_EMUL | DEV_MMIO32;
- break;
- case PCI_DEVICE_ID_NLM_NOR:
- flags = MEM_RES_EMUL;
- break;
- case PCI_DEVICE_ID_NLM_MMC:
- irq = PIC_MMC_IRQ;
- flags = MEM_RES_EMUL;
- break;
- case PCI_DEVICE_ID_NLM_EHCI:
- irq = PIC_USB_0_IRQ + f;
- break;
- case PCI_DEVICE_ID_NLM_PCIE:
- break;
- case PCI_DEVICE_ID_NLM_ICI:
- case PCI_DEVICE_ID_NLM_PIC:
- case PCI_DEVICE_ID_NLM_FMN:
- default:
- return;
- }
-
- dinfo = pci_read_device(pcib, domain, b, s, f, sizeof(*xlp_dinfo));
- if (dinfo == NULL)
- return;
- xlp_dinfo = (struct xlp_devinfo *)dinfo;
- xlp_dinfo->irq = irq;
- xlp_dinfo->flags = flags;
-
- /* SoC device with interrupts need fixup (except PCIe controllers) */
- if (irq != 0 && devid != PCI_DEVICE_ID_NLM_PCIE)
- PCIB_WRITE_CONFIG(pcib, b, s, f, XLP_PCI_DEVSCRATCH_REG0 << 2,
- (1 << 8) | irq, 4);
-
- /* memory resource from ecfg space, if MEM_RES_EMUL is set */
- if ((flags & MEM_RES_EMUL) != 0)
- xlp_dinfo->mem_res_start = XLP_DEFAULT_IO_BASE + devoffset +
- XLP_IO_PCI_HDRSZ;
- pci_add_child(dev, dinfo);
-}
-
-static int
-xlp_pci_attach(device_t dev)
-{
- device_t pcib = device_get_parent(dev);
- int maxslots, s, f, pcifunchigh;
- int busno;
uint8_t hdrtype;
/*
* The on-chip devices are on a bus that is almost, but not
* quite, completely like PCI. Add those things by hand.
*/
+ pcib = device_get_parent(dev);
busno = pcib_get_bus(dev);
maxslots = PCIB_MAXSLOTS(pcib);
for (s = 0; s <= maxslots; s++) {
@@ -247,8 +100,35 @@ xlp_pci_attach(device_t dev)
continue;
if (hdrtype & PCIM_MFDEV)
pcifunchigh = PCI_FUNCMAX;
- for (f = 0; f <= pcifunchigh; f++)
- xlp_add_soc_child(pcib, dev, busno, s, f);
+ node = s / 8;
+ for (f = 0; f <= pcifunchigh; f++) {
+ devoffset = XLP_HDR_OFFSET(node, 0, s % 8, f);
+ if (!nlm_dev_exists(devoffset))
+ continue;
+
+ /* Find if there is a desc for the SoC device */
+ devid = PCIB_READ_CONFIG(pcib, busno, s, f,
PCIR_DEVICE, 2);
+
+ /* Skip devices that don't have a proper PCI header */
+ switch (devid) {
+ case PCI_DEVICE_ID_NLM_ICI:
+ case PCI_DEVICE_ID_NLM_PIC:
+ case PCI_DEVICE_ID_NLM_FMN:
+ case PCI_DEVICE_ID_NLM_UART:
+ case PCI_DEVICE_ID_NLM_I2C:
+ case PCI_DEVICE_ID_NLM_NOR:
+ case PCI_DEVICE_ID_NLM_MMC:
+ continue;
+ case PCI_DEVICE_ID_NLM_EHCI:
+ irq = PIC_USB_IRQ(f);
+ PCIB_WRITE_CONFIG(pcib, busno, s, f,
+ XLP_PCI_DEVSCRATCH_REG0 << 2,
+ (1 << 8) | irq, 4);
+ }
+ dinfo = pci_read_device(pcib, pcib_get_domain(dev),
+ busno, s, f, sizeof(*dinfo));
+ pci_add_child(dev, dinfo);
+ }
}
return (bus_generic_attach(dev));
}
@@ -274,9 +154,6 @@ static device_method_t xlp_pci_methods[]
/* Device interface */
DEVMETHOD(device_probe, xlp_pci_probe),
DEVMETHOD(device_attach, xlp_pci_attach),
- DEVMETHOD(bus_alloc_resource, xlp_pci_alloc_resource),
- DEVMETHOD(bus_release_resource, xlp_pci_release_resource),
-
DEVMETHOD_END
};
@@ -284,48 +161,6 @@ DEFINE_CLASS_1(pci, xlp_pci_driver, xlp_
pci_driver);
DRIVER_MODULE(xlp_pci, pcib, xlp_pci_driver, pci_devclass, 0, 0);
-static struct rman irq_rman, port_rman, mem_rman, emul_rman;
-
-static void
-xlp_pcib_init_resources(void)
-{
- irq_rman.rm_start = 0;
- irq_rman.rm_end = 255;
- irq_rman.rm_type = RMAN_ARRAY;
- irq_rman.rm_descr = "PCI Mapped Interrupts";
- if (rman_init(&irq_rman)
- || rman_manage_region(&irq_rman, 0, 255))
- panic("pci_init_resources irq_rman");
-
- port_rman.rm_start = 0;
- port_rman.rm_end = ~0ul;
- port_rman.rm_type = RMAN_ARRAY;
- port_rman.rm_descr = "I/O ports";
- if (rman_init(&port_rman)
- || rman_manage_region(&port_rman, PCIE_IO_BASE, PCIE_IO_LIMIT))
- panic("pci_init_resources port_rman");
-
- mem_rman.rm_start = 0;
- mem_rman.rm_end = ~0ul;
- mem_rman.rm_type = RMAN_ARRAY;
- mem_rman.rm_descr = "I/O memory";
- if (rman_init(&mem_rman)
- || rman_manage_region(&mem_rman, PCIE_MEM_BASE, PCIE_MEM_LIMIT))
- panic("pci_init_resources mem_rman");
-
- /*
- * This includes the GBU (nor flash) memory range and the PCIe
- * memory area.
- */
- emul_rman.rm_start = 0;
- emul_rman.rm_end = ~0ul;
- emul_rman.rm_type = RMAN_ARRAY;
- emul_rman.rm_descr = "Emulated MEMIO";
- if (rman_init(&emul_rman)
- || rman_manage_region(&emul_rman, EMUL_MEM_START, EMUL_MEM_END))
- panic("pci_init_resources emul_rman");
-}
-
static int
xlp_pcib_probe(device_t dev)
{
@@ -474,8 +309,6 @@ xlp_pcib_attach(device_t dev)
{
int node, link;
- xlp_pcib_init_resources();
-
/* enable hardware swap on all nodes/links */
for (node = 0; node < XLP_MAX_NODES; node++)
for (link = 0; link < 4; link++)
@@ -673,79 +506,6 @@ mips_platform_pcib_teardown_intr(device_
return (bus_generic_teardown_intr(dev, child, irq, cookie));
}
-static struct resource *
-xlp_pcib_alloc_resource(device_t bus, device_t child, int type, int *rid,
- u_long start, u_long end, u_long count, u_int flags)
-{
- struct rman *rm = NULL;
- struct resource *rv;
- void *va;
- int needactivate = flags & RF_ACTIVE;
-
- switch (type) {
- case SYS_RES_IRQ:
- rm = &irq_rman;
- break;
-
- case SYS_RES_IOPORT:
- rm = &port_rman;
- break;
-
- case SYS_RES_MEMORY:
- if (start >= EMUL_MEM_START && start <= EMUL_MEM_END)
- rm = &emul_rman;
- else
- rm = &mem_rman;
- break;
-
- default:
- return (0);
- }
-
- rv = rman_reserve_resource(rm, start, end, count, flags, child);
- if (rv == NULL)
- return (NULL);
-
- rman_set_rid(rv, *rid);
-
- if (type == SYS_RES_MEMORY || type == SYS_RES_IOPORT) {
- va = pmap_mapdev(start, count);
- rman_set_bushandle(rv, (bus_space_handle_t)va);
- rman_set_bustag(rv, rmi_bus_space);
- }
- if (needactivate) {
- if (bus_activate_resource(child, type, *rid, rv)) {
- rman_release_resource(rv);
- return (NULL);
- }
- }
- return (rv);
-}
-
-static int
-xlp_pcib_release_resource(device_t bus, device_t child, int type, int rid,
- struct resource *r)
-{
-
- return (rman_release_resource(r));
-}
-
-static int
-xlp_pcib_activate_resource(device_t bus, device_t child, int type, int rid,
- struct resource *r)
-{
-
- return (rman_activate_resource(r));
-}
-
-static int
-xlp_pcib_deactivate_resource(device_t bus, device_t child, int type, int rid,
- struct resource *r)
-{
-
- return (rman_deactivate_resource(r));
-}
-
static int
mips_pcib_route_interrupt(device_t bus, device_t dev, int pin)
{
@@ -784,10 +544,10 @@ static device_method_t xlp_pcib_methods[
/* Bus interface */
DEVMETHOD(bus_read_ivar, xlp_pcib_read_ivar),
DEVMETHOD(bus_write_ivar, xlp_pcib_write_ivar),
- DEVMETHOD(bus_alloc_resource, xlp_pcib_alloc_resource),
- DEVMETHOD(bus_release_resource, xlp_pcib_release_resource),
- DEVMETHOD(bus_activate_resource, xlp_pcib_activate_resource),
- DEVMETHOD(bus_deactivate_resource, xlp_pcib_deactivate_resource),
+ DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
+ DEVMETHOD(bus_release_resource, bus_generic_release_resource),
+ DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
+ DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
DEVMETHOD(bus_setup_intr, mips_platform_pcib_setup_intr),
DEVMETHOD(bus_teardown_intr, mips_platform_pcib_teardown_intr),
Added: head/sys/mips/nlm/xlp_simplebus.c
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/mips/nlm/xlp_simplebus.c Fri Feb 27 23:33:53 2015
(r279384)
@@ -0,0 +1,323 @@
+/*-
+ * Copyright (c) 2015 Broadcom Corporation
+ * (based on sys/dev/fdt/simplebus.c)
+ * Copyright (c) 2013 Nathan Whitehorn
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/module.h>
+#include <sys/bus.h>
+#include <sys/conf.h>
+#include <sys/kernel.h>
+#include <sys/rman.h>
+
+#include <vm/vm.h>
+#include <vm/vm_param.h>
+#include <vm/pmap.h>
+
+#include <machine/bus.h>
+#include <machine/pmap.h>
+#include <machine/intr_machdep.h>
+
+#include <mips/nlm/hal/haldefs.h>
+#include <mips/nlm/interrupt.h>
+#include <mips/nlm/hal/iomap.h>
+#include <mips/nlm/hal/mips-extns.h>
+#include <mips/nlm/hal/pcibus.h>
+#include <mips/nlm/xlp.h>
+
+#include <dev/ofw/openfirm.h>
+#include <dev/ofw/ofw_bus.h>
+#include <dev/ofw/ofw_bus_subr.h>
+
+#include <dev/fdt/simplebus.h>
+
+/* flash memory region for chipselects */
+#define GBU_MEM_BASE 0x16000000UL
+#define GBU_MEM_LIMIT 0x17ffffffUL
+
+/*
+ * Device registers in pci ecfg memory region for devices without regular PCI
BARs
+ */
+#define PCI_ECFG_BASE XLP_DEFAULT_IO_BASE
+#define PCI_ECFG_LIMIT (XLP_DEFAULT_IO_BASE + 0x0fffffff)
+
+/*
+ * Bus interface.
+ */
+static int xlp_simplebus_probe(device_t dev);
+static struct resource *xlp_simplebus_alloc_resource(device_t, device_t, int,
+ int *, u_long, u_long, u_long, u_int);
+static int xlp_simplebus_activate_resource(device_t, device_t, int,
+ int, struct resource *);
+static int xlp_simplebus_setup_intr(device_t, device_t,
+ struct resource *, int, driver_filter_t *, driver_intr_t *, void *, void
**);
+
+/*
+ * ofw_bus interface
+ */
+static int xlp_simplebus_ofw_map_intr(device_t, device_t,
phandle_t,
+ int, pcell_t *);
+
+static devclass_t simplebus_devclass;
+static device_method_t xlp_simplebus_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_probe, xlp_simplebus_probe),
+
+ DEVMETHOD(bus_alloc_resource, xlp_simplebus_alloc_resource),
+ DEVMETHOD(bus_activate_resource, xlp_simplebus_activate_resource),
+ DEVMETHOD(bus_setup_intr, xlp_simplebus_setup_intr),
+
+ DEVMETHOD(ofw_bus_map_intr, xlp_simplebus_ofw_map_intr),
+ DEVMETHOD_END
+};
+
+DEFINE_CLASS_1(simplebus, xlp_simplebus_driver, xlp_simplebus_methods,
+ sizeof(struct simplebus_softc), simplebus_driver);
+DRIVER_MODULE(xlp_simplebus, ofwbus, xlp_simplebus_driver, simplebus_devclass,
+ 0, 0);
+
+static struct rman irq_rman, port_rman, mem_rman, pci_ecfg_rman, gbu_rman;
+
+static void
+xlp_simplebus_init_resources(void)
+{
+ irq_rman.rm_start = 0;
+ irq_rman.rm_end = 255;
+ irq_rman.rm_type = RMAN_ARRAY;
+ irq_rman.rm_descr = "PCI Mapped Interrupts";
+ if (rman_init(&irq_rman)
+ || rman_manage_region(&irq_rman, 0, 255))
+ panic("xlp_simplebus_init_resources irq_rman");
+
+ port_rman.rm_start = 0;
+ port_rman.rm_end = ~0ul;
+ port_rman.rm_type = RMAN_ARRAY;
+ port_rman.rm_descr = "I/O ports";
+ if (rman_init(&port_rman)
+ || rman_manage_region(&port_rman, PCIE_IO_BASE, PCIE_IO_LIMIT))
+ panic("xlp_simplebus_init_resources port_rman");
+
+ mem_rman.rm_start = 0;
+ mem_rman.rm_end = ~0ul;
+ mem_rman.rm_type = RMAN_ARRAY;
+ mem_rman.rm_descr = "I/O memory";
+ if (rman_init(&mem_rman)
+ || rman_manage_region(&mem_rman, PCIE_MEM_BASE, PCIE_MEM_LIMIT))
+ panic("xlp_simplebus_init_resources mem_rman");
+
+ pci_ecfg_rman.rm_start = 0;
+ pci_ecfg_rman.rm_end = ~0ul;
+ pci_ecfg_rman.rm_type = RMAN_ARRAY;
+ pci_ecfg_rman.rm_descr = "PCI ECFG IO";
+ if (rman_init(&pci_ecfg_rman) || rman_manage_region(&pci_ecfg_rman,
+ PCI_ECFG_BASE, PCI_ECFG_LIMIT))
+ panic("xlp_simplebus_init_resources pci_ecfg_rman");
+
+ gbu_rman.rm_start = 0;
+ gbu_rman.rm_end = ~0ul;
+ gbu_rman.rm_type = RMAN_ARRAY;
+ gbu_rman.rm_descr = "Flash region";
+ if (rman_init(&gbu_rman)
+ || rman_manage_region(&gbu_rman, GBU_MEM_BASE, GBU_MEM_LIMIT))
+ panic("xlp_simplebus_init_resources gbu_rman");
+}
+
+static int
+xlp_simplebus_probe(device_t dev)
+{
+
+ if (!ofw_bus_status_okay(dev))
+ return (ENXIO);
+
+ /*
+ * FDT data puts a "simple-bus" compatible string on many things that
+ * have children but aren't really busses in our world. Without a
+ * ranges property we will fail to attach, so just fail to probe too.
+ */
+ if (!(ofw_bus_is_compatible(dev, "simple-bus") &&
+ ofw_bus_has_prop(dev, "ranges")) &&
+ (ofw_bus_get_type(dev) == NULL || strcmp(ofw_bus_get_type(dev),
+ "soc") != 0))
+ return (ENXIO);
+
+ xlp_simplebus_init_resources();
+ device_set_desc(dev, "XLP SoC bus");
+
+ return (BUS_PROBE_SPECIFIC);
+}
+
+static struct resource *
+xlp_simplebus_alloc_resource(device_t bus, device_t child, int type, int *rid,
+ u_long start, u_long end, u_long count, u_int flags)
+{
+ struct rman *rm;
+ struct resource *rv;
+ struct resource_list_entry *rle;
+ struct simplebus_softc *sc;
+ struct simplebus_devinfo *di;
+ bus_space_tag_t bustag;
+ int j, isdefault, passthrough, needsactivate;
+
+ passthrough = (device_get_parent(child) != bus);
+ needsactivate = flags & RF_ACTIVE;
+ sc = device_get_softc(bus);
+ di = device_get_ivars(child);
+ rle = NULL;
+ bustag = NULL;
+
+ if (!passthrough) {
+ isdefault = (start == 0UL && end == ~0UL);
+ if (isdefault) {
+ rle = resource_list_find(&di->rl, type, *rid);
+ if (rle == NULL)
+ return (NULL);
+ if (rle->res != NULL)
+ panic("%s: resource entry is busy", __func__);
+ start = rle->start;
+ count = ulmax(count, rle->count);
+ end = ulmax(rle->end, start + count - 1);
+ }
+ if (type == SYS_RES_MEMORY) {
+ /* Remap through ranges property */
+ for (j = 0; j < sc->nranges; j++) {
+ if (start >= sc->ranges[j].bus && end <
+ sc->ranges[j].bus + sc->ranges[j].size) {
+ start -= sc->ranges[j].bus;
+ start += sc->ranges[j].host;
+ end -= sc->ranges[j].bus;
+ end += sc->ranges[j].host;
+ break;
+ }
+ }
+ if (j == sc->nranges && sc->nranges != 0) {
+ if (bootverbose)
+ device_printf(bus, "Could not map
resource "
+ "%#lx-%#lx\n", start, end);
+ return (NULL);
+ }
+ }
+ }
+ switch (type) {
+ case SYS_RES_IRQ:
+ rm = &irq_rman;
+ break;
+ case SYS_RES_IOPORT:
+ rm = &port_rman;
+ bustag = rmi_bus_space;
+ break;
+ case SYS_RES_MEMORY:
+ if (start >= GBU_MEM_BASE && end <= GBU_MEM_LIMIT) {
+ rm = &gbu_rman;
+ bustag = rmi_bus_space;
+ } else if (start >= PCI_ECFG_BASE && end <= PCI_ECFG_LIMIT) {
+ rm = &pci_ecfg_rman;
+ bustag = rmi_uart_bus_space;
+ } else if (start >= PCIE_MEM_BASE && end <= PCIE_MEM_LIMIT) {
+ rm = &mem_rman;
+ bustag = rmi_bus_space;
+ } else {
+ if (bootverbose)
+ device_printf(bus, "Invalid MEM range"
+ "%#lx-%#lx\n", start, end);
+ return (NULL);
+ }
+ break;
+ default:
+ return (NULL);
+ }
+
+ rv = rman_reserve_resource(rm, start, end, count, flags, child);
+ if (rv == 0) {
+ device_printf(bus, "%s: could not reserve resource for %s\n",
+ __func__, device_get_nameunit(child));
+ return (NULL);
+ }
+
+ rman_set_rid(rv, *rid);
+ if (bustag != NULL)
+ rman_set_bustag(rv, bustag);
+
+ if (needsactivate) {
+ if (bus_activate_resource(child, type, *rid, rv)) {
+ device_printf(bus, "%s: could not activate resource\n",
+ __func__);
+ rman_release_resource(rv);
+ return (NULL);
+ }
+ }
+
+ return (rv);
+}
+
+static int
+xlp_simplebus_activate_resource(device_t bus, device_t child, int type, int
rid,
+ struct resource *r)
+{
+ void *vaddr;
+ vm_paddr_t paddr;
+ vm_size_t psize;
+
+ /*
+ * If this is a memory resource, use pmap_mapdev to map it.
+ */
+ if (type == SYS_RES_MEMORY || type == SYS_RES_IOPORT) {
+ paddr = rman_get_start(r);
+ psize = rman_get_size(r);
+ vaddr = pmap_mapdev(paddr, psize);
+
+ rman_set_virtual(r, vaddr);
+ rman_set_bushandle(r, (bus_space_handle_t)(uintptr_t)vaddr);
+ }
+
+ return (rman_activate_resource(r));
+}
+
+static int
+xlp_simplebus_setup_intr(device_t dev, device_t child, struct resource *res,
int flags,
+ driver_filter_t *filt, driver_intr_t *intr, void *arg, void **cookiep)
+{
+ register_t s;
+ int irq;
+
+ /* setup irq */
+ s = intr_disable();
+ irq = rman_get_start(res);
+ cpu_establish_hardintr(device_get_nameunit(child), filt, intr, arg,
+ irq, flags, cookiep);
+ intr_restore(s);
+ return (0);
+}
+
+static int
+xlp_simplebus_ofw_map_intr(device_t dev, device_t child, phandle_t iparent,
int icells,
+ pcell_t *irq)
+{
+
+ return ((int)irq[0]);
+}
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