On 11/02/14 08:07, Tijl Coosemans wrote:
On Sun, 02 Nov 2014 07:27:24 -0800 Nathan Whitehorn <nwhiteh...@freebsd.org>
wrote:
There is actually a write-combining memory type on PowerPC. You can set
it the same way as on x86 (with VM_MEMATTR_WRITE_COMBINING).
Yes, that's what the patch does, but in sys/powerpc (aim/mmu_oea.c,
aim/mmu_oea64.c and booke/pmap.c) VM_MEMATTR_WRITE_COMBINING becomes
PTE_I meaning Caching Inhibited. Does powerpc do write-combining for
this type?
It is write-combining on all north bridges that support write combining.
Regular caching-inhibited is PTE_I | PTE_G. PTE_I means there is no
caching, which you want, and PTE_G means that every read/write
instruction is a read/write operation of exactly that length exactly
right then on the bus. Removing the PTE_G (guarded) flag means the bus
is free to do write-combining if it wants to and is the standard way to
signal this.
That code also maps VM_MEMATTR_WRITE_BACK to PTE_I by the way. I think
that should be PTE_M (write-back caching + cache coherency).
I think you're right but would like to consider for a few days before
changing it.
-Nathan
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