On Mon, Jul 07, 2014 at 05:17:17AM +0000, Hans Petter Selasky wrote: > Author: hselasky > Date: Mon Jul 7 05:17:16 2014 > New Revision: 268354 > URL: http://svnweb.freebsd.org/changeset/base/268354 > > Log: > Improve support for Intel Lynx Point USB 3.0 controllers by masking > the port routing bits like done in Linux. > > MFC after: 1 week > Tested by: Tur-Wei Chan <twc...@singnet.com.sg> > > Modified: > head/sys/dev/usb/controller/xhci_pci.c > head/sys/dev/usb/controller/xhcireg.h > > Modified: head/sys/dev/usb/controller/xhci_pci.c > ============================================================================== > --- head/sys/dev/usb/controller/xhci_pci.c Mon Jul 7 03:10:56 2014 > (r268353) > +++ head/sys/dev/usb/controller/xhci_pci.c Mon Jul 7 05:17:16 2014 > (r268354) > @@ -157,6 +157,9 @@ xhci_pci_port_route(device_t self, uint3 > temp |= set; > temp &= ~clear; > > + /* Don't set bits which the hardware doesn't support */ > + temp &= pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4); > + > pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp, 4); > pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp, 4); >
Is there a reason you only exclude ports that PCI_XHCI_INTEL_USB3PRM reports as not switchable to SuperSpeed, but not also ports that the hardware reports as not routable between the EHCI and xHCI controller via PCI_XHCI_INTEL_USB2PRM (as Linux does, which might be wront, though)? > > Modified: head/sys/dev/usb/controller/xhcireg.h > ============================================================================== > --- head/sys/dev/usb/controller/xhcireg.h Mon Jul 7 03:10:56 2014 > (r268353) > +++ head/sys/dev/usb/controller/xhcireg.h Mon Jul 7 05:17:16 2014 > (r268354) > @@ -35,7 +35,9 @@ > #define PCI_XHCI_FLADJ 0x61 /* RW frame length adjust */ > > #define PCI_XHCI_INTEL_XUSB2PR 0xD0 /* Intel USB2 Port Routing */ > +#define PCI_XHCI_INTEL_USB2PRM 0xD4 /* Intel USB2 Port Routing Mask > */ > #define PCI_XHCI_INTEL_USB3_PSSEN 0xD8 /* Intel USB3 Port SuperSpeed > Enable */ > +#define PCI_XHCI_INTEL_USB3PRM 0xDC /* Intel USB3 Port Routing Mask > */ > > /* XHCI capability registers */ > #define XHCI_CAPLENGTH 0x00 /* RO capability */ Marius _______________________________________________ svn-src-head@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
