Author: grehan
Date: Thu Apr 10 19:15:58 2014
New Revision: 264324
URL: http://svnweb.freebsd.org/changeset/base/264324

Log:
  Rework r264179.
  
  - remove redundant code
  - remove erroneous setting of the error return
    in vmmdev_ioctl()
  - use style(9) initialization
  - in vmx_inject_pir(), document the race condition
    that the final conditional statement was detecting,
  
  Tested with both gcc and clang builds.
  
  Reviewed by:  neel

Modified:
  head/sys/amd64/vmm/intel/vmx.c
  head/sys/amd64/vmm/io/vatpic.c
  head/sys/amd64/vmm/vmm_dev.c

Modified: head/sys/amd64/vmm/intel/vmx.c
==============================================================================
--- head/sys/amd64/vmm/intel/vmx.c      Thu Apr 10 18:43:02 2014        
(r264323)
+++ head/sys/amd64/vmm/intel/vmx.c      Thu Apr 10 19:15:58 2014        
(r264324)
@@ -2755,6 +2755,7 @@ vmx_inject_pir(struct vlapic *vlapic)
        }
 
        pirval = 0;
+       pirbase = -1;
        lapic = vlapic->apic_page;
 
        val = atomic_readandclear_long(&pir_desc->pir[0]);
@@ -2788,16 +2789,29 @@ vmx_inject_pir(struct vlapic *vlapic)
                pirbase = 192;
                pirval = val;
        }
-       if (pirbase == -1) {
-               VCPU_CTR0(vlapic->vm, vlapic->vcpuid, "vmx_inject_pir: "
-                   "no posted interrupt found");
-               return;
-       }
+
        VLAPIC_CTR_IRR(vlapic, "vmx_inject_pir");
 
        /*
         * Update RVI so the processor can evaluate pending virtual
         * interrupts on VM-entry.
+        *
+        * It is possible for pirval to be 0 here, even though the
+        * pending bit has been set. The scenario is:
+        * CPU-Y is sending a posted interrupt to CPU-X, which
+        * is running a guest and processing posted interrupts in h/w.
+        * CPU-X will eventually exit and the state seen in s/w is
+        * the pending bit set, but no PIR bits set.
+        *
+        *      CPU-X                      CPU-Y
+        *   (vm running)                (host running)
+        *   rx posted interrupt
+        *   CLEAR pending bit
+        *                               SET PIR bit
+        *   READ/CLEAR PIR bits
+        *                               SET pending bit
+        *   (vm exit)
+        *   pending bit set, PIR 0
         */
        if (pirval != 0) {
                rvi = pirbase + flsl(pirval) - 1;

Modified: head/sys/amd64/vmm/io/vatpic.c
==============================================================================
--- head/sys/amd64/vmm/io/vatpic.c      Thu Apr 10 18:43:02 2014        
(r264323)
+++ head/sys/amd64/vmm/io/vatpic.c      Thu Apr 10 19:15:58 2014        
(r264324)
@@ -473,9 +473,10 @@ vatpic_master_handler(void *vm, int vcpu
 {
        struct vatpic *vatpic;
        struct atpic *atpic;
-       int error = 0;;
+       int error;
        uint8_t val;
 
+       error = 0;
        vatpic = vm_atpic(vm);
        atpic = &vatpic->atpic[0];
 

Modified: head/sys/amd64/vmm/vmm_dev.c
==============================================================================
--- head/sys/amd64/vmm/vmm_dev.c        Thu Apr 10 18:43:02 2014        
(r264323)
+++ head/sys/amd64/vmm/vmm_dev.c        Thu Apr 10 19:15:58 2014        
(r264324)
@@ -171,6 +171,7 @@ vmmdev_ioctl(struct cdev *cdev, u_long c
        if (sc == NULL)
                return (ENXIO);
 
+       error = 0;
        vcpu = -1;
        state_changed = 0;
 
@@ -231,7 +232,6 @@ vmmdev_ioctl(struct cdev *cdev, u_long c
                break;
 
        default:
-               error = EINVAL;
                break;
        }
 
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