Author: ian
Date: Mon Feb 24 03:47:39 2014
New Revision: 262426
URL: http://svnweb.freebsd.org/changeset/base/262426
Log:
Invalidate caches immediately upon entry to init_secondary(). Also set
the Bufferable bit in the PDE entries of the secondary processor startup
pagetables.
The caches really need to be invalidated even earlier than this, but this
is a big step in the right direction. The invalidate needs to happen
before the MMU is enabled, which means it has to be called from asm code
that's running with physical addressing. Fixing that will be handled in
a future change.
Modified:
head/sys/arm/arm/mp_machdep.c
Modified: head/sys/arm/arm/mp_machdep.c
==============================================================================
--- head/sys/arm/arm/mp_machdep.c Mon Feb 24 02:47:47 2014
(r262425)
+++ head/sys/arm/arm/mp_machdep.c Mon Feb 24 03:47:39 2014
(r262426)
@@ -128,10 +128,10 @@ cpu_mp_start(void)
bzero((void *)temp_pagetable_va, L1_TABLE_SIZE);
for (addr = arm_physmem_kernaddr; addr <= addr_end; addr += L1_S_SIZE)
{
((int *)(temp_pagetable_va))[addr >> L1_S_SHIFT] =
-
L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW)|L1_S_DOM(PMAP_DOMAIN_KERNEL)|addr;
+
L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_B|L1_S_AP(AP_KRW)|L1_S_DOM(PMAP_DOMAIN_KERNEL)|addr;
((int *)(temp_pagetable_va))[(addr -
arm_physmem_kernaddr + KERNVIRTADDR) >> L1_S_SHIFT] =
-
L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW)|L1_S_DOM(PMAP_DOMAIN_KERNEL)|addr;
+
L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_B|L1_S_AP(AP_KRW)|L1_S_DOM(PMAP_DOMAIN_KERNEL)|addr;
}
#if defined(CPU_MV_PJ4B)
@@ -173,6 +173,8 @@ init_secondary(int cpu)
uint32_t loop_counter;
int start = 0, end = 0;
+ cpu_idcache_inv_all();
+
cpu_setup(NULL);
setttb(pmap_pa);
cpu_tlb_flushID();
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