Author: loos
Date: Mon Dec 9 11:33:45 2013
New Revision: 259125
URL: http://svnweb.freebsd.org/changeset/base/259125
Log:
Fix a few typos on the scm (control module) pin mux definitions.
Approved by: adrian (mentor)
Modified:
head/sys/arm/ti/am335x/am335x_scm_padconf.c
Modified: head/sys/arm/ti/am335x/am335x_scm_padconf.c
==============================================================================
--- head/sys/arm/ti/am335x/am335x_scm_padconf.c Mon Dec 9 08:39:33 2013
(r259124)
+++ head/sys/arm/ti/am335x/am335x_scm_padconf.c Mon Dec 9 11:33:45 2013
(r259125)
@@ -170,8 +170,8 @@ const struct ti_scm_padconf ti_padconf_d
_PIN(0x948, "MDIO", 0, 7, "mdio_data", "timer6",
"uart5_rxd", "uart3_ctsn", "mmc0_sdcd","mmc1_cmd", "mmc2_cmd","gpio0_0"),
_PIN(0x94c, "MDC", 1, 7, "mdio_clk", "timer5",
"uart5_txd", "uart3_rtsn", "mmc0_sdwp", "mmc1_clk", "mmc2_clk", "gpio0_1"),
_PIN(0x950, "SPI0_SCLK", 2, 7, "spi0_sclk", "uart2_rxd",
"I2C2_SDA", "ehrpwm0A", "pr1_uart0_cts_n", "pr1_edio_sof", "EMU2", "gpio0_2"),
- _PIN(0x954, "SPI0_D0", 3, 7, "spi0_d0", "uart2_txd",
"i2C2_SCL", "ehrpwm0B", "pr1_uart0_rts_n", "pr1_edio_latch_in", "EMU3",
"gpio0_3"),
- _PIN(0x958, "SPIO_D1", 4, 7, "spi0_d1", "mmc1_sdwp",
"I2C1_SDA", "ehrpwm0_tripzone_input", "pr1_uart0_rxd", "pr1_edio_data_in0",
"pr1_edio_data_out0", "gpio0_4"),
+ _PIN(0x954, "SPI0_D0", 3, 7, "spi0_d0", "uart2_txd",
"I2C2_SCL", "ehrpwm0B", "pr1_uart0_rts_n", "pr1_edio_latch_in", "EMU3",
"gpio0_3"),
+ _PIN(0x958, "SPI0_D1", 4, 7, "spi0_d1", "mmc1_sdwp",
"I2C1_SDA", "ehrpwm0_tripzone_input", "pr1_uart0_rxd", "pr1_edio_data_in0",
"pr1_edio_data_out0", "gpio0_4"),
_PIN(0x95c, "SPI0_CS0", 5, 7, "spi0_cs0", "mmc2_sdwp",
"I2C1_SCL", "ehrpwm0_synci", "pr1_uart0_txd", "pr1_edio_data_in1",
"pr1_edio_data_out1", "gpio0_5"),
_PIN(0x960, "SPI0_CS1", 6, 7, "spi0_cs1", "uart3_rxd",
"eCAP1_in_PWM1_out", "mcc0_pow", "xdm_event_intr2", "mmc0_sdcd", "EMU4",
"gpio0_6"),
_PIN(0x964, "ECAP0_IN_PWM0_OUT",7, 7, "eCAP0_in_PWM0_out", "uart3_txd",
"spi1_cs1", "pr1_ecap0_ecap_capin_apwm_o", "spi1_sclk", "mmc0_sdwp",
"xdma_event_intr2", "gpio0_7"),
@@ -180,7 +180,7 @@ const struct ti_scm_padconf ti_padconf_d
_PIN(0x970, "UART0_rxd", 42, 7, "uart0_rxd", "spi1_cs0",
"dcan0_tx", "I2C2_SDA", "eCAP2_in_PWM2_out", "pr1_pru1_pru_r30_14",
"pr1_pru1_pru_r31_14", "gpio1_10"),
_PIN(0x974, "UART0_txd", 43, 7, "uart0_txd", "spi1_cs1",
"dcan0_rx", "I2C2_SCL", "eCAP1_in_PWM1_out", "pr1_pru1_pru_r30_15",
"pr1_pru1_pru_r31_15", "gpio1_11"),
_PIN(0x978, "UART1_CTSn", 12, 7, "uart1_ctsn", "timer6_mux1",
"dcan0_tx", "I2C2_SDA", "spi1_cs0", "pr1_uart0_cts_n", "pr1_edc_latch0_in",
"gpio0_12"),
- _PIN(0x97c, "UART1_RTSn", 13, 7, "uart1_rtsn", "timer5_mux1",
"dcan0_rx", "I2C2_SCL", "spi1_cs1", "pr1_uart0_rts_n ",
"pr1_edc_latch1_in", "gpio0_13"),
+ _PIN(0x97c, "UART1_RTSn", 13, 7, "uart1_rtsn", "timer5_mux1",
"dcan0_rx", "I2C2_SCL", "spi1_cs1", "pr1_uart0_rts_n", "pr1_edc_latch1_in",
"gpio0_13"),
_PIN(0x980, "UART1_RXD", 14, 7, "uart1_rxd", "mmc1_sdwp",
"dcan1_tx", "I2C1_SDA", NULL, "pr1_uart0_rxd", "pr1_pru1_pru_r31_16",
"gpio0_14"),
_PIN(0x984, "UART1_TXD", 15, 7, "uart1_txd", "mmc2_sdwp",
"dcan1_rx", "I2C1_SCL", NULL, "pr1_uart0_txd", "pr1_pru0_pru_r31_16",
"gpio0_15"),
_PIN(0x988, "I2C0_SDA", 101, 7, "I2C0_SDA", "timer4",
"uart2_ctsn", "eCAP2_in_PWM2_out", NULL, NULL, NULL, "gpio3_5"),
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