Author: ian Date: Thu Oct 31 23:05:05 2013 New Revision: 257476 URL: http://svnweb.freebsd.org/changeset/base/257476
Log: Revamp the SoC identity numbering scheme to be more in line with the way Freescale numbers the chips in the ID registers. Modified: head/sys/arm/freescale/imx/imx_machdep.h Modified: head/sys/arm/freescale/imx/imx_machdep.h ============================================================================== --- head/sys/arm/freescale/imx/imx_machdep.h Thu Oct 31 22:46:03 2013 (r257475) +++ head/sys/arm/freescale/imx/imx_machdep.h Thu Oct 31 23:05:05 2013 (r257476) @@ -36,24 +36,27 @@ void imx_devmap_addentry(vm_paddr_t _pa, vm_size_t _sz); void imx_wdog_cpu_reset(vm_offset_t _wdcr_phys) __attribute__((__noreturn__)); +/* From here down, routines are implemented in imxNN_machdep.c. */ + /* * SoC identity. + * According to the documentation, there is such a thing as an i.MX6 Dual + * (non-lite flavor). However, Freescale doesn't seem to have assigned it a + * number in their code for determining the SoC type in u-boot. + * + * To-do: put silicon revision numbers into the low-order bits somewhere. */ -#define IMXSOC_51 0x05000100 -#define IMXSOC_53 0x05000300 -#define IMXSOC_6S 0x06000010 -#define IMXSOC_6SL 0x06000011 -#define IMXSOC_6D 0x06000020 -#define IMXSOC_6DL 0x06000021 -#define IMXSOC_6Q 0x06000040 -#define IMXSOC_6QL 0x06000041 -#define IMXSOC_FAMSHIFT 24 +#define IMXSOC_51 0x51000000 +#define IMXSOC_53 0x53000000 +#define IMXSOC_6SL 0x60000000 +#define IMXSOC_6DL 0x61000000 +#define IMXSOC_6S 0x62000000 +#define IMXSOC_6Q 0x63000000 +#define IMXSOC_FAMSHIFT 28 u_int imx_soc_type(void); u_int imx_soc_family(void); -/* From here down, routines are implemented in imxNN_machdep.c. */ - void imx_devmap_init(void); /* _______________________________________________ svn-src-head@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
