Author: br
Date: Wed Oct 16 15:20:27 2013
New Revision: 256629
URL: http://svnweb.freebsd.org/changeset/base/256629
Log:
Add CPU ID for ARM Cortex A5.
Approved by: cognet (mentor)
Modified:
head/sys/arm/arm/cpufunc.c
head/sys/arm/arm/identcpu.c
head/sys/arm/include/armreg.h
Modified: head/sys/arm/arm/cpufunc.c
==============================================================================
--- head/sys/arm/arm/cpufunc.c Wed Oct 16 14:24:22 2013 (r256628)
+++ head/sys/arm/arm/cpufunc.c Wed Oct 16 15:20:27 2013 (r256629)
@@ -1476,7 +1476,8 @@ set_cpufuncs()
}
#endif /* CPU_ARM1136 || CPU_ARM1176 */
#ifdef CPU_CORTEXA
- if (cputype == CPU_ID_CORTEXA7 ||
+ if (cputype == CPU_ID_CORTEXA5 ||
+ cputype == CPU_ID_CORTEXA7 ||
cputype == CPU_ID_CORTEXA8R1 ||
cputype == CPU_ID_CORTEXA8R2 ||
cputype == CPU_ID_CORTEXA8R3 ||
Modified: head/sys/arm/arm/identcpu.c
==============================================================================
--- head/sys/arm/arm/identcpu.c Wed Oct 16 14:24:22 2013 (r256628)
+++ head/sys/arm/arm/identcpu.c Wed Oct 16 15:20:27 2013 (r256629)
@@ -236,6 +236,8 @@ const struct cpuidtab cpuids[] = {
{ CPU_ID_ARM1026EJS, CPU_CLASS_ARM10EJ, "ARM1026EJ-S",
generic_steppings },
+ { CPU_ID_CORTEXA5, CPU_CLASS_CORTEXA, "Cortex A5",
+ generic_steppings },
{ CPU_ID_CORTEXA7, CPU_CLASS_CORTEXA, "Cortex A7",
generic_steppings },
{ CPU_ID_CORTEXA8R1, CPU_CLASS_CORTEXA, "Cortex A8-r1",
Modified: head/sys/arm/include/armreg.h
==============================================================================
--- head/sys/arm/include/armreg.h Wed Oct 16 14:24:22 2013
(r256628)
+++ head/sys/arm/include/armreg.h Wed Oct 16 15:20:27 2013
(r256629)
@@ -147,6 +147,7 @@
#define CPU_ID_ARM1136JS 0x4107b360
#define CPU_ID_ARM1136JSR1 0x4117b360
#define CPU_ID_ARM1176JZS 0x410fb760
+#define CPU_ID_CORTEXA5 0x410fc050
#define CPU_ID_CORTEXA7 0x410fc070
#define CPU_ID_CORTEXA8R1 0x411fc080
#define CPU_ID_CORTEXA8R2 0x412fc080
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