Author: yongari
Date: Sat Jul 20 07:09:50 2013
New Revision: 253480
URL: http://svnweb.freebsd.org/changeset/base/253480
Log:
Setup the PCIE Fast Training Sequence (FTS) value to prevent
transmit hangs for 57766 and non Ax versions of 57765.
While here, correct definition of BGE_CHIPREV_57765_AX.
Modified:
head/sys/dev/bge/if_bge.c
head/sys/dev/bge/if_bgereg.h
Modified: head/sys/dev/bge/if_bge.c
==============================================================================
--- head/sys/dev/bge/if_bge.c Sat Jul 20 03:55:56 2013 (r253479)
+++ head/sys/dev/bge/if_bge.c Sat Jul 20 07:09:50 2013 (r253480)
@@ -1796,6 +1796,20 @@ bge_chipinit(struct bge_softc *sc)
pci_write_config(sc->bge_dev, BGE_PCI_MSI_DATA + 2, val, 2);
}
+ if (sc->bge_asicrev == BGE_ASICREV_BCM57765 ||
+ sc->bge_asicrev == BGE_ASICREV_BCM57766) {
+ /*
+ * For the 57766 and non Ax versions of 57765, bootcode
+ * needs to setup the PCIE Fast Training Sequence (FTS)
+ * value to prevent transmit hangs.
+ */
+ if (sc->bge_chiprev != BGE_CHIPREV_57765_AX) {
+ CSR_WRITE_4(sc, BGE_CPMU_PADRNG_CTL,
+ CSR_READ_4(sc, BGE_CPMU_PADRNG_CTL) |
+ BGE_CPMU_PADRNG_CTL_RDIV2);
+ }
+ }
+
/*
* Set up the PCI DMA control register.
*/
Modified: head/sys/dev/bge/if_bgereg.h
==============================================================================
--- head/sys/dev/bge/if_bgereg.h Sat Jul 20 03:55:56 2013
(r253479)
+++ head/sys/dev/bge/if_bgereg.h Sat Jul 20 07:09:50 2013
(r253480)
@@ -378,6 +378,7 @@
#define BGE_CHIPREV_5717_AX 0x57170
#define BGE_CHIPREV_5717_BX 0x57171
#define BGE_CHIPREV_5761_AX 0x57611
+#define BGE_CHIPREV_57765_AX 0x577850
#define BGE_CHIPREV_5784_AX 0x57841
/* PCI DMA Read/Write Control register */
@@ -1289,6 +1290,7 @@
#define BGE_CPMU_MUTEX_REQ 0x365C
#define BGE_CPMU_MUTEX_GNT 0x3660
#define BGE_CPMU_PHY_STRAP 0x3664
+#define BGE_CPMU_PADRNG_CTL 0x3668
/* Central Power Management Unit (CPMU) register */
#define BGE_CPMU_CTRL_LINK_IDLE_MODE 0x00000200
@@ -1328,6 +1330,9 @@
/* CPMU GPHY Strap register */
#define BGE_CPMU_PHY_STRAP_IS_SERDES 0x00000020
+/* CPMU Padring Control register */
+#define BGE_CPMU_PADRNG_CTL_RDIV2 0x00040000
+
/*
* Mbuf Cluster Free registers (has nothing to do with BSD mbufs)
*/
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