On 31 October 2012 11:33, Attilio Rao <atti...@freebsd.org> wrote: >> Doesn't this padding to cache line size only help x86 processors in an >> SMP kernel? I was expecting to see some #ifdef SMP so that we don't pay >> a big price for no gain in small-memory ARM systems and such. But maybe >> I'm misunderstanding the reason for the padding. > > I didn't want to do this because this would be meaning that SMP option > may become a completely killer for modules/kernel ABI compatibility.
Right, but you didn't make it configurable for us embedded peeps who still care about memory usage. > Also, if you look at the modified list of locks I don't think they > should be too much, I hardly believe ARM UP is going to hurt that much > from loosing some padding in tdq structures or callout. There's a few million more embedded MIPS boards out there with 16mb/32mb of RAM than target PCs for FreeBSD. Would you mind making the padding part configurable and just default it to "do the padding" ? That way for the atheros MIPS builds I can turn it off and save on the memory overhead. Thanks, Adrian _______________________________________________ svn-src-head@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
