Author: jchandra
Date: Tue Mar 27 15:43:32 2012
New Revision: 233564
URL: http://svn.freebsd.org/changeset/base/233564
Log:
Resource allocation for XLP SoC SDHCI slots
The on-chip SD slots do not have PCI BARs corresponding to them, so
this has to be handled in the custom SoC memory allocation.
Provide memory resource for rids corresponding to BAR 0 and 1 in
the custom allocation code.
Modified:
head/sys/mips/conf/std.XLP
head/sys/mips/nlm/xlp_pci.c
Modified: head/sys/mips/conf/std.XLP
==============================================================================
--- head/sys/mips/conf/std.XLP Tue Mar 27 15:39:55 2012 (r233563)
+++ head/sys/mips/conf/std.XLP Tue Mar 27 15:43:32 2012 (r233564)
@@ -110,3 +110,8 @@ options GEOM_ELI
# NOR
device cfi
device cfid
+
+# MMC/SD
+device mmc # MMC/SD bus
+device mmcsd # MMC/SD memory card
+device sdhci # Generic PCI SD Host Controller
Modified: head/sys/mips/nlm/xlp_pci.c
==============================================================================
--- head/sys/mips/nlm/xlp_pci.c Tue Mar 27 15:39:55 2012 (r233563)
+++ head/sys/mips/nlm/xlp_pci.c Tue Mar 27 15:43:32 2012 (r233564)
@@ -165,8 +165,22 @@ xlp_pci_alloc_resource(device_t bus, dev
/* no emulation for IO ports */
if (type == SYS_RES_IOPORT)
return (NULL);
+
start = xlp_devinfo->mem_res_start;
count = XLP_PCIE_CFG_SIZE - XLP_IO_PCI_HDRSZ;
+
+ /* MMC needs to 2 slots with rids 16 and 20 and a
+ * fixup for size */
+ if (pci_get_device(child) == PCI_DEVICE_ID_NLM_MMC) {
+ count = 0x100;
+ if (*rid == 16)
+ ; /* first slot already setup */
+ else if (*rid == 20)
+ start += 0x100; /* second slot */
+ else
+ return (NULL);
+ }
+
end = start + count - 1;
r = BUS_ALLOC_RESOURCE(device_get_parent(bus), child,
type, rid, start, end, count, flags);
@@ -254,6 +268,8 @@ xlp_add_soc_child(device_t pcib, device_
xlp_dinfo = (struct xlp_devinfo *)dinfo;
xlp_dinfo->irq = irq;
xlp_dinfo->flags = flags;
+
+ /* memory resource from ecfg space, if MEM_RES_EMUL is set */
if ((flags & MEM_RES_EMUL) != 0)
xlp_dinfo->mem_res_start = XLP_DEFAULT_IO_BASE + devoffset +
XLP_IO_PCI_HDRSZ;
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