On Fri, Mar 02, 2012 at 05:18:37PM -0500, John Baldwin wrote:
> On Friday, March 02, 2012 4:45:52 pm Marius Strobl wrote:
> > On Fri, Mar 02, 2012 at 08:38:05PM +0000, John Baldwin wrote:
> > > Author: jhb
> > > Date: Fri Mar  2 20:38:04 2012
> > > New Revision: 232403
> > > URL: http://svn.freebsd.org/changeset/base/232403
> > > 
> > > Log:
> > >   - Add a bus_dma tag to each PCI bus that is a child of a Host-PCI 
> > > bridge.
> > >     The tag enforces a single restriction that all DMA transactions must 
> > > not
> > >     cross a 4GB boundary.  Note that while this restriction technically 
> > > only
> > >     applies to PCI-express, this change applies it to all PCI devices as 
> > > it
> > >     is simpler to implement that way and errs on the side of caution.
> > 
> > Hrm, wouldn't it have been more appropriate to implement this in the
> > Host-PCI bridges instead? Probably for anything but x86 this would
> > allow to easily distinguish at least between PCI and PCI-Express capable
> > bus hierarchies and would move the PAE workaround to the MD bits to
> > where it belongs.
> 
> The PAE workaround is dying as I've already fixed HEAD to make boundary 
> arguments
> use a bus_addr_t.  However, I committed it in this fashion so it can be MFC'd
> since I can't merge the boundary KBI change.
> 
> The reason I did not do this in the Host-PCI bridge drivers is that we would 
> have
> to do this in umpteen different drivers, and all for a change that is 
> mandated by
> the PCI spec and not specific to the various specs the Host-PCI bridge drivers
> all cater to (OFW, ACPI, MPTable, various and sundry embedded platforms, 
> etc.).
> 

Well, on !x86 we don't have generic Host-PCI bridge drivers based on
what you call specs here, but rather specific drivers for individual
Host-PCI, Host-PCI-X and Host-PCI-Express chips. Whether the PCI*
buses beneath these are enumerated using FDT, OFW etc. doesn't really
matter in this context.

Marius

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