Author: ed
Date: Sat Dec 31 19:01:48 2011
New Revision: 229135
URL: http://svn.freebsd.org/changeset/base/229135

Log:
  Upgrade libcompiler_rt to upstream revision 147390.
  
  This version of libcompiler_rt adds support for __mulo[sdt]i4(), which
  computes a multiply and its overflow flag. There are also a lot of
  cleanup fixes to headers that don't really affect us.
  
  Updating to this revision should make it a bit easier to contribute
  changes back to the LLVM developers.

Added:
  head/contrib/compiler-rt/lib/int_endianness.h
     - copied unchanged from r229109, 
vendor/compiler-rt/dist/lib/int_endianness.h
  head/contrib/compiler-rt/lib/int_math.h
     - copied unchanged from r229109, vendor/compiler-rt/dist/lib/int_math.h
  head/contrib/compiler-rt/lib/int_types.h
     - copied unchanged from r229109, vendor/compiler-rt/dist/lib/int_types.h
  head/contrib/compiler-rt/lib/int_util.c
     - copied unchanged from r229109, vendor/compiler-rt/dist/lib/int_util.c
  head/contrib/compiler-rt/lib/int_util.h
     - copied unchanged from r229109, vendor/compiler-rt/dist/lib/int_util.h
  head/contrib/compiler-rt/lib/mulodi4.c
     - copied unchanged from r229109, vendor/compiler-rt/dist/lib/mulodi4.c
  head/contrib/compiler-rt/lib/mulosi4.c
     - copied unchanged from r229109, vendor/compiler-rt/dist/lib/mulosi4.c
  head/contrib/compiler-rt/lib/muloti4.c
     - copied unchanged from r229109, vendor/compiler-rt/dist/lib/muloti4.c
Deleted:
  head/contrib/compiler-rt/lib/abi.h
  head/contrib/compiler-rt/lib/apple_versioning.c
  head/contrib/compiler-rt/lib/endianness.h
Modified:
  head/contrib/compiler-rt/LICENSE.TXT
  head/contrib/compiler-rt/README.txt
  head/contrib/compiler-rt/lib/absvdi2.c
  head/contrib/compiler-rt/lib/absvsi2.c
  head/contrib/compiler-rt/lib/absvti2.c
  head/contrib/compiler-rt/lib/adddf3.c
  head/contrib/compiler-rt/lib/addsf3.c
  head/contrib/compiler-rt/lib/addvdi3.c
  head/contrib/compiler-rt/lib/addvsi3.c
  head/contrib/compiler-rt/lib/addvti3.c
  head/contrib/compiler-rt/lib/arm/adddf3vfp.S
  head/contrib/compiler-rt/lib/arm/addsf3vfp.S
  head/contrib/compiler-rt/lib/arm/divdf3vfp.S
  head/contrib/compiler-rt/lib/arm/divsf3vfp.S
  head/contrib/compiler-rt/lib/arm/eqdf2vfp.S
  head/contrib/compiler-rt/lib/arm/eqsf2vfp.S
  head/contrib/compiler-rt/lib/arm/extendsfdf2vfp.S
  head/contrib/compiler-rt/lib/arm/fixdfsivfp.S
  head/contrib/compiler-rt/lib/arm/fixsfsivfp.S
  head/contrib/compiler-rt/lib/arm/fixunsdfsivfp.S
  head/contrib/compiler-rt/lib/arm/fixunssfsivfp.S
  head/contrib/compiler-rt/lib/arm/floatsidfvfp.S
  head/contrib/compiler-rt/lib/arm/floatsisfvfp.S
  head/contrib/compiler-rt/lib/arm/floatunssidfvfp.S
  head/contrib/compiler-rt/lib/arm/floatunssisfvfp.S
  head/contrib/compiler-rt/lib/arm/gedf2vfp.S
  head/contrib/compiler-rt/lib/arm/gesf2vfp.S
  head/contrib/compiler-rt/lib/arm/gtdf2vfp.S
  head/contrib/compiler-rt/lib/arm/gtsf2vfp.S
  head/contrib/compiler-rt/lib/arm/ledf2vfp.S
  head/contrib/compiler-rt/lib/arm/lesf2vfp.S
  head/contrib/compiler-rt/lib/arm/ltdf2vfp.S
  head/contrib/compiler-rt/lib/arm/ltsf2vfp.S
  head/contrib/compiler-rt/lib/arm/muldf3vfp.S
  head/contrib/compiler-rt/lib/arm/mulsf3vfp.S
  head/contrib/compiler-rt/lib/arm/nedf2vfp.S
  head/contrib/compiler-rt/lib/arm/negdf2vfp.S
  head/contrib/compiler-rt/lib/arm/negsf2vfp.S
  head/contrib/compiler-rt/lib/arm/nesf2vfp.S
  head/contrib/compiler-rt/lib/arm/subdf3vfp.S
  head/contrib/compiler-rt/lib/arm/subsf3vfp.S
  head/contrib/compiler-rt/lib/arm/truncdfsf2vfp.S
  head/contrib/compiler-rt/lib/arm/unorddf2vfp.S
  head/contrib/compiler-rt/lib/arm/unordsf2vfp.S
  head/contrib/compiler-rt/lib/ashldi3.c
  head/contrib/compiler-rt/lib/ashrdi3.c
  head/contrib/compiler-rt/lib/assembly.h
  head/contrib/compiler-rt/lib/clear_cache.c
  head/contrib/compiler-rt/lib/clzdi2.c
  head/contrib/compiler-rt/lib/clzsi2.c
  head/contrib/compiler-rt/lib/cmpdi2.c
  head/contrib/compiler-rt/lib/ctzdi2.c
  head/contrib/compiler-rt/lib/ctzsi2.c
  head/contrib/compiler-rt/lib/divdc3.c
  head/contrib/compiler-rt/lib/divdf3.c
  head/contrib/compiler-rt/lib/divdi3.c
  head/contrib/compiler-rt/lib/divmoddi4.c
  head/contrib/compiler-rt/lib/divmodsi4.c
  head/contrib/compiler-rt/lib/divsc3.c
  head/contrib/compiler-rt/lib/divsf3.c
  head/contrib/compiler-rt/lib/divsi3.c
  head/contrib/compiler-rt/lib/divxc3.c
  head/contrib/compiler-rt/lib/enable_execute_stack.c
  head/contrib/compiler-rt/lib/eprintf.c
  head/contrib/compiler-rt/lib/extendsfdf2.c
  head/contrib/compiler-rt/lib/ffsdi2.c
  head/contrib/compiler-rt/lib/fixdfdi.c
  head/contrib/compiler-rt/lib/fixdfsi.c
  head/contrib/compiler-rt/lib/fixsfdi.c
  head/contrib/compiler-rt/lib/fixsfsi.c
  head/contrib/compiler-rt/lib/fixunsdfdi.c
  head/contrib/compiler-rt/lib/fixunsdfsi.c
  head/contrib/compiler-rt/lib/fixunssfdi.c
  head/contrib/compiler-rt/lib/fixunssfsi.c
  head/contrib/compiler-rt/lib/floatdidf.c
  head/contrib/compiler-rt/lib/floatdisf.c
  head/contrib/compiler-rt/lib/floatsidf.c
  head/contrib/compiler-rt/lib/floatsisf.c
  head/contrib/compiler-rt/lib/floattidf.c
  head/contrib/compiler-rt/lib/floattisf.c
  head/contrib/compiler-rt/lib/floattixf.c
  head/contrib/compiler-rt/lib/floatundidf.c
  head/contrib/compiler-rt/lib/floatundisf.c
  head/contrib/compiler-rt/lib/floatunsidf.c
  head/contrib/compiler-rt/lib/floatunsisf.c
  head/contrib/compiler-rt/lib/floatuntidf.c
  head/contrib/compiler-rt/lib/floatuntisf.c
  head/contrib/compiler-rt/lib/floatuntixf.c
  head/contrib/compiler-rt/lib/fp_lib.h
  head/contrib/compiler-rt/lib/gcc_personality_v0.c
  head/contrib/compiler-rt/lib/int_lib.h
  head/contrib/compiler-rt/lib/lshrdi3.c
  head/contrib/compiler-rt/lib/moddi3.c
  head/contrib/compiler-rt/lib/modsi3.c
  head/contrib/compiler-rt/lib/muldc3.c
  head/contrib/compiler-rt/lib/muldf3.c
  head/contrib/compiler-rt/lib/muldi3.c
  head/contrib/compiler-rt/lib/mulsc3.c
  head/contrib/compiler-rt/lib/mulsf3.c
  head/contrib/compiler-rt/lib/mulvdi3.c
  head/contrib/compiler-rt/lib/mulvsi3.c
  head/contrib/compiler-rt/lib/mulvti3.c
  head/contrib/compiler-rt/lib/mulxc3.c
  head/contrib/compiler-rt/lib/negdf2.c
  head/contrib/compiler-rt/lib/negsf2.c
  head/contrib/compiler-rt/lib/negvdi2.c
  head/contrib/compiler-rt/lib/negvsi2.c
  head/contrib/compiler-rt/lib/negvti2.c
  head/contrib/compiler-rt/lib/paritydi2.c
  head/contrib/compiler-rt/lib/paritysi2.c
  head/contrib/compiler-rt/lib/popcountdi2.c
  head/contrib/compiler-rt/lib/popcountsi2.c
  head/contrib/compiler-rt/lib/powidf2.c
  head/contrib/compiler-rt/lib/powisf2.c
  head/contrib/compiler-rt/lib/ppc/DD.h
  head/contrib/compiler-rt/lib/ppc/divtc3.c
  head/contrib/compiler-rt/lib/ppc/fixtfdi.c
  head/contrib/compiler-rt/lib/ppc/fixunstfdi.c
  head/contrib/compiler-rt/lib/ppc/floatditf.c
  head/contrib/compiler-rt/lib/ppc/floatunditf.c
  head/contrib/compiler-rt/lib/ppc/multc3.c
  head/contrib/compiler-rt/lib/subdf3.c
  head/contrib/compiler-rt/lib/subsf3.c
  head/contrib/compiler-rt/lib/subvdi3.c
  head/contrib/compiler-rt/lib/subvsi3.c
  head/contrib/compiler-rt/lib/subvti3.c
  head/contrib/compiler-rt/lib/trampoline_setup.c
  head/contrib/compiler-rt/lib/truncdfsf2.c
  head/contrib/compiler-rt/lib/ucmpdi2.c
  head/contrib/compiler-rt/lib/udivdi3.c
  head/contrib/compiler-rt/lib/udivmoddi4.c
  head/contrib/compiler-rt/lib/udivmodsi4.c
  head/contrib/compiler-rt/lib/udivmodti4.c
  head/contrib/compiler-rt/lib/udivsi3.c
  head/contrib/compiler-rt/lib/umoddi3.c
  head/contrib/compiler-rt/lib/umodsi3.c
  head/contrib/compiler-rt/lib/x86_64/floatdidf.c
  head/contrib/compiler-rt/lib/x86_64/floatdisf.c
  head/contrib/compiler-rt/lib/x86_64/floatdixf.c
  head/lib/libcompiler_rt/Makefile
Directory Properties:
  head/contrib/compiler-rt/   (props changed)

Modified: head/contrib/compiler-rt/LICENSE.TXT
==============================================================================
--- head/contrib/compiler-rt/LICENSE.TXT        Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/LICENSE.TXT        Sat Dec 31 19:01:48 2011        
(r229135)
@@ -74,3 +74,25 @@ AUTHORS OR COPYRIGHT HOLDERS BE LIABLE F
 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 THE SOFTWARE.
+
+==============================================================================
+Copyrights and Licenses for Third Party Software Distributed with LLVM:
+==============================================================================
+The LLVM software contains code written by third parties.  Such software will
+have its own individual LICENSE.TXT file in the directory in which it appears.
+This file will describe the copyrights, license, and restrictions which apply
+to that code.
+
+The disclaimer of warranty in the University of Illinois Open Source License
+applies to all code in the LLVM Distribution, and nothing in any of the
+other licenses gives permission to use the names of the LLVM Team or the
+University of Illinois to endorse or promote products derived from this
+Software.
+
+The following pieces of software have additional or alternate copyrights,
+licenses, and/or restrictions:
+
+Program             Directory
+-------             ---------
+sysinfo             lib/asan/sysinfo
+mach_override       lib/asan/mach_override

Modified: head/contrib/compiler-rt/README.txt
==============================================================================
--- head/contrib/compiler-rt/README.txt Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/README.txt Sat Dec 31 19:01:48 2011        
(r229135)
@@ -106,6 +106,15 @@ si_int __mulvsi3(si_int a, si_int b);  /
 di_int __mulvdi3(di_int a, di_int b);  // a * b
 ti_int __mulvti3(ti_int a, ti_int b);  // a * b
 
+
+// Integral arithmetic which returns if overflow
+
+si_int __mulosi4(si_int a, si_int b, int* overflow);  // a * b, overflow set 
to one if result not in signed range
+di_int __mulodi4(di_int a, di_int b, int* overflow);  // a * b, overflow set 
to one if result not in signed range
+ti_int __muloti4(ti_int a, ti_int b, int* overflow);  // a * b, overflow set to
+ one if result not in signed range
+
+
 //  Integral comparison: a  < b -> 0
 //                       a == b -> 1
 //                       a  > b -> 2

Modified: head/contrib/compiler-rt/lib/absvdi2.c
==============================================================================
--- head/contrib/compiler-rt/lib/absvdi2.c      Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/absvdi2.c      Sat Dec 31 19:01:48 2011        
(r229135)
@@ -11,10 +11,8 @@
  *
  *===----------------------------------------------------------------------===
  */
-#include "abi.h"
 
 #include "int_lib.h"
-#include <stdlib.h>
 
 /* Returns: absolute value */
 

Modified: head/contrib/compiler-rt/lib/absvsi2.c
==============================================================================
--- head/contrib/compiler-rt/lib/absvsi2.c      Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/absvsi2.c      Sat Dec 31 19:01:48 2011        
(r229135)
@@ -11,10 +11,8 @@
  *
  * ===----------------------------------------------------------------------===
  */
-#include "abi.h"
 
 #include "int_lib.h"
-#include <stdlib.h>
 
 /* Returns: absolute value */
 

Modified: head/contrib/compiler-rt/lib/absvti2.c
==============================================================================
--- head/contrib/compiler-rt/lib/absvti2.c      Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/absvti2.c      Sat Dec 31 19:01:48 2011        
(r229135)
@@ -15,7 +15,6 @@
 #if __x86_64
 
 #include "int_lib.h"
-#include <stdlib.h>
 
 /* Returns: absolute value */
 

Modified: head/contrib/compiler-rt/lib/adddf3.c
==============================================================================
--- head/contrib/compiler-rt/lib/adddf3.c       Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/adddf3.c       Sat Dec 31 19:01:48 2011        
(r229135)
@@ -12,8 +12,6 @@
 //
 
//===----------------------------------------------------------------------===//
 
-#include "abi.h"
-
 #define DOUBLE_PRECISION
 #include "fp_lib.h"
 

Modified: head/contrib/compiler-rt/lib/addsf3.c
==============================================================================
--- head/contrib/compiler-rt/lib/addsf3.c       Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/addsf3.c       Sat Dec 31 19:01:48 2011        
(r229135)
@@ -12,8 +12,6 @@
 //
 
//===----------------------------------------------------------------------===//
 
-#include "abi.h"
-
 #define SINGLE_PRECISION
 #include "fp_lib.h"
 

Modified: head/contrib/compiler-rt/lib/addvdi3.c
==============================================================================
--- head/contrib/compiler-rt/lib/addvdi3.c      Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/addvdi3.c      Sat Dec 31 19:01:48 2011        
(r229135)
@@ -11,10 +11,8 @@
  *
  * ===----------------------------------------------------------------------===
  */
-#include "abi.h"
 
 #include "int_lib.h"
-#include <stdlib.h>
 
 /* Returns: a + b */
 

Modified: head/contrib/compiler-rt/lib/addvsi3.c
==============================================================================
--- head/contrib/compiler-rt/lib/addvsi3.c      Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/addvsi3.c      Sat Dec 31 19:01:48 2011        
(r229135)
@@ -11,10 +11,8 @@
  *
  * ===----------------------------------------------------------------------===
  */
-#include "abi.h"
 
 #include "int_lib.h"
-#include <stdlib.h>
 
 /* Returns: a + b */
 

Modified: head/contrib/compiler-rt/lib/addvti3.c
==============================================================================
--- head/contrib/compiler-rt/lib/addvti3.c      Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/addvti3.c      Sat Dec 31 19:01:48 2011        
(r229135)
@@ -15,7 +15,6 @@
 #if __x86_64
 
 #include "int_lib.h"
-#include <stdlib.h>
 
 /* Returns: a + b */
 

Modified: head/contrib/compiler-rt/lib/arm/adddf3vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/adddf3vfp.S        Sat Dec 31 18:53:11 
2011        (r229134)
+++ head/contrib/compiler-rt/lib/arm/adddf3vfp.S        Sat Dec 31 19:01:48 
2011        (r229135)
@@ -15,10 +15,11 @@
 // Adds two double precision floating point numbers using the Darwin
 // calling convention where double arguments are passsed in GPR pairs
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__adddf3vfp)
-       fmdrr   d6, r0, r1              // move first param from r0/r1 pair 
into d6
-       fmdrr   d7, r2, r3              // move second param from r2/r3 pair 
into d7
-       faddd   d6, d6, d7              
-       fmrrd   r0, r1, d6              // move result back to r0/r1 pair
+       vmov    d6, r0, r1              // move first param from r0/r1 pair 
into d6
+       vmov    d7, r2, r3              // move second param from r2/r3 pair 
into d7
+       vadd.f64 d6, d6, d7             
+       vmov    r0, r1, d6              // move result back to r0/r1 pair
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/addsf3vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/addsf3vfp.S        Sat Dec 31 18:53:11 
2011        (r229134)
+++ head/contrib/compiler-rt/lib/arm/addsf3vfp.S        Sat Dec 31 19:01:48 
2011        (r229135)
@@ -15,10 +15,11 @@
 // Adds two single precision floating point numbers using the Darwin
 // calling convention where single arguments are passsed in GPRs
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__addsf3vfp)
-       fmsr    s14, r0         // move first param from r0 into float register
-       fmsr    s15, r1         // move second param from r1 into float register
-       fadds   s14, s14, s15
-       fmrs    r0, s14         // move result back to r0
+       vmov    s14, r0         // move first param from r0 into float register
+       vmov    s15, r1         // move second param from r1 into float register
+       vadd.f32 s14, s14, s15
+       vmov    r0, s14         // move result back to r0
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/divdf3vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/divdf3vfp.S        Sat Dec 31 18:53:11 
2011        (r229134)
+++ head/contrib/compiler-rt/lib/arm/divdf3vfp.S        Sat Dec 31 19:01:48 
2011        (r229135)
@@ -15,10 +15,11 @@
 // Divides two double precision floating point numbers using the Darwin
 // calling convention where double arguments are passsed in GPR pairs
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__divdf3vfp)
-       fmdrr   d6, r0, r1              // move first param from r0/r1 pair 
into d6
-       fmdrr   d7, r2, r3              // move second param from r2/r3 pair 
into d7
-       fdivd   d5, d6, d7              
-       fmrrd   r0, r1, d5              // move result back to r0/r1 pair
+       vmov    d6, r0, r1              // move first param from r0/r1 pair 
into d6
+       vmov    d7, r2, r3              // move second param from r2/r3 pair 
into d7
+       vdiv.f64 d5, d6, d7             
+       vmov    r0, r1, d5              // move result back to r0/r1 pair
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/divsf3vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/divsf3vfp.S        Sat Dec 31 18:53:11 
2011        (r229134)
+++ head/contrib/compiler-rt/lib/arm/divsf3vfp.S        Sat Dec 31 19:01:48 
2011        (r229135)
@@ -15,10 +15,11 @@
 // Divides two single precision floating point numbers using the Darwin
 // calling convention where single arguments are passsed like 32-bit ints.
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__divsf3vfp)
-       fmsr    s14, r0         // move first param from r0 into float register
-       fmsr    s15, r1         // move second param from r1 into float register
-       fdivs   s13, s14, s15
-       fmrs    r0, s13         // move result back to r0
+       vmov    s14, r0         // move first param from r0 into float register
+       vmov    s15, r1         // move second param from r1 into float register
+       vdiv.f32 s13, s14, s15
+       vmov    r0, s13         // move result back to r0
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/eqdf2vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/eqdf2vfp.S Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/arm/eqdf2vfp.S Sat Dec 31 19:01:48 2011        
(r229135)
@@ -16,12 +16,13 @@
 // Uses Darwin calling convention where double precision arguments are passsed 
 // like in GPR pairs.
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__eqdf2vfp)
-       fmdrr   d6, r0, r1      // load r0/r1 pair in double register
-       fmdrr   d7, r2, r3      // load r2/r3 pair in double register
-       fcmpd   d6, d7          
-       fmstat
+       vmov    d6, r0, r1      // load r0/r1 pair in double register
+       vmov    d7, r2, r3      // load r2/r3 pair in double register
+       vcmp.f64 d6, d7         
+       vmrs    apsr_nzcv, fpscr
        moveq   r0, #1          // set result register to 1 if equal
        movne   r0, #0
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/eqsf2vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/eqsf2vfp.S Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/arm/eqsf2vfp.S Sat Dec 31 19:01:48 2011        
(r229135)
@@ -16,12 +16,13 @@
 // Uses Darwin calling convention where single precision arguments are passsed 
 // like 32-bit ints
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__eqsf2vfp)
-       fmsr    s14, r0     // move from GPR 0 to float register
-       fmsr    s15, r1     // move from GPR 1 to float register
-       fcmps   s14, s15
-       fmstat
+       vmov    s14, r0     // move from GPR 0 to float register
+       vmov    s15, r1     // move from GPR 1 to float register
+       vcmp.f32 s14, s15
+       vmrs    apsr_nzcv, fpscr
        moveq   r0, #1      // set result register to 1 if equal
        movne   r0, #0
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/extendsfdf2vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/extendsfdf2vfp.S   Sat Dec 31 18:53:11 
2011        (r229134)
+++ head/contrib/compiler-rt/lib/arm/extendsfdf2vfp.S   Sat Dec 31 19:01:48 
2011        (r229135)
@@ -16,9 +16,10 @@
 // Uses Darwin calling convention where a single precision parameter is 
 // passed in a GPR and a double precision result is returned in R0/R1 pair.
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__extendsfdf2vfp)
-       fmsr    s15, r0      // load float register from R0
-       fcvtds  d7, s15      // convert single to double
-       fmrrd   r0, r1, d7   // return result in r0/r1 pair
+       vmov    s15, r0      // load float register from R0
+       vcvt.f64.f32 d7, s15 // convert single to double
+       vmov    r0, r1, d7   // return result in r0/r1 pair
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/fixdfsivfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/fixdfsivfp.S       Sat Dec 31 18:53:11 
2011        (r229134)
+++ head/contrib/compiler-rt/lib/arm/fixdfsivfp.S       Sat Dec 31 19:01:48 
2011        (r229135)
@@ -16,9 +16,10 @@
 // Uses Darwin calling convention where a double precision parameter is 
 // passed in GPR register pair.
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__fixdfsivfp)
-       fmdrr   d7, r0, r1    // load double register from R0/R1
-       ftosizd s15, d7       // convert double to 32-bit int into s15
-       fmrs    r0, s15       // move s15 to result register
+       vmov    d7, r0, r1    // load double register from R0/R1
+       vcvt.s32.f64 s15, d7  // convert double to 32-bit int into s15
+       vmov    r0, s15       // move s15 to result register
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/fixsfsivfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/fixsfsivfp.S       Sat Dec 31 18:53:11 
2011        (r229134)
+++ head/contrib/compiler-rt/lib/arm/fixsfsivfp.S       Sat Dec 31 19:01:48 
2011        (r229135)
@@ -16,9 +16,10 @@
 // Uses Darwin calling convention where a single precision parameter is 
 // passed in a GPR..
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__fixsfsivfp)
-       fmsr    s15, r0      // load float register from R0
-       ftosizs s15, s15     // convert single to 32-bit int into s15
-       fmrs    r0, s15      // move s15 to result register
+       vmov    s15, r0        // load float register from R0
+       vcvt.s32.f32 s15, s15  // convert single to 32-bit int into s15
+       vmov    r0, s15        // move s15 to result register
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/fixunsdfsivfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/fixunsdfsivfp.S    Sat Dec 31 18:53:11 
2011        (r229134)
+++ head/contrib/compiler-rt/lib/arm/fixunsdfsivfp.S    Sat Dec 31 19:01:48 
2011        (r229135)
@@ -17,9 +17,10 @@
 // Uses Darwin calling convention where a double precision parameter is 
 // passed in GPR register pair.
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__fixunsdfsivfp)
-       fmdrr   d7, r0, r1    // load double register from R0/R1
-       ftouizd s15, d7       // convert double to 32-bit int into s15
-       fmrs    r0, s15       // move s15 to result register
+       vmov    d7, r0, r1    // load double register from R0/R1
+       vcvt.u32.f64 s15, d7  // convert double to 32-bit int into s15
+       vmov    r0, s15       // move s15 to result register
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/fixunssfsivfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/fixunssfsivfp.S    Sat Dec 31 18:53:11 
2011        (r229134)
+++ head/contrib/compiler-rt/lib/arm/fixunssfsivfp.S    Sat Dec 31 19:01:48 
2011        (r229135)
@@ -17,9 +17,10 @@
 // Uses Darwin calling convention where a single precision parameter is 
 // passed in a GPR..
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__fixunssfsivfp)
-       fmsr    s15, r0      // load float register from R0
-       ftouizs s15, s15     // convert single to 32-bit unsigned into s15
-       fmrs    r0, s15      // move s15 to result register
+       vmov    s15, r0        // load float register from R0
+       vcvt.u32.f32 s15, s15  // convert single to 32-bit unsigned into s15
+       vmov    r0, s15        // move s15 to result register
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/floatsidfvfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/floatsidfvfp.S     Sat Dec 31 18:53:11 
2011        (r229134)
+++ head/contrib/compiler-rt/lib/arm/floatsidfvfp.S     Sat Dec 31 19:01:48 
2011        (r229135)
@@ -16,9 +16,10 @@
 // Uses Darwin calling convention where a double precision result is 
 // return in GPR register pair.
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__floatsidfvfp)
-       fmsr    s15, r0            // move int to float register s15
-       fsitod  d7, s15        // convert 32-bit int in s15 to double in d7
-       fmrrd   r0, r1, d7     // move d7 to result register pair r0/r1
+       vmov    s15, r0        // move int to float register s15
+       vcvt.f64.s32 d7, s15   // convert 32-bit int in s15 to double in d7
+       vmov    r0, r1, d7     // move d7 to result register pair r0/r1
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/floatsisfvfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/floatsisfvfp.S     Sat Dec 31 18:53:11 
2011        (r229134)
+++ head/contrib/compiler-rt/lib/arm/floatsisfvfp.S     Sat Dec 31 19:01:48 
2011        (r229135)
@@ -16,9 +16,10 @@
 // Uses Darwin calling convention where a single precision result is 
 // return in a GPR..
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__floatsisfvfp)
-       fmsr    s15, r0      // move int to float register s15
-       fsitos  s15, s15     // convert 32-bit int in s15 to float in s15
-       fmrs    r0, s15      // move s15 to result register
+       vmov    s15, r0        // move int to float register s15
+       vcvt.f32.s32 s15, s15  // convert 32-bit int in s15 to float in s15
+       vmov    r0, s15        // move s15 to result register
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/floatunssidfvfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/floatunssidfvfp.S  Sat Dec 31 18:53:11 
2011        (r229134)
+++ head/contrib/compiler-rt/lib/arm/floatunssidfvfp.S  Sat Dec 31 19:01:48 
2011        (r229135)
@@ -16,9 +16,10 @@
 // Uses Darwin calling convention where a double precision result is 
 // return in GPR register pair.
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__floatunssidfvfp)
-       fmsr    s15, r0            // move int to float register s15
-       fuitod  d7, s15        // convert 32-bit int in s15 to double in d7
-       fmrrd   r0, r1, d7     // move d7 to result register pair r0/r1
+       vmov    s15, r0        // move int to float register s15
+       vcvt.f64.u32 d7, s15   // convert 32-bit int in s15 to double in d7
+       vmov    r0, r1, d7     // move d7 to result register pair r0/r1
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/floatunssisfvfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/floatunssisfvfp.S  Sat Dec 31 18:53:11 
2011        (r229134)
+++ head/contrib/compiler-rt/lib/arm/floatunssisfvfp.S  Sat Dec 31 19:01:48 
2011        (r229135)
@@ -16,9 +16,10 @@
 // Uses Darwin calling convention where a single precision result is 
 // return in a GPR..
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__floatunssisfvfp)
-       fmsr    s15, r0      // move int to float register s15
-       fuitos  s15, s15     // convert 32-bit int in s15 to float in s15
-       fmrs    r0, s15      // move s15 to result register
+       vmov    s15, r0        // move int to float register s15
+       vcvt.f32.u32 s15, s15  // convert 32-bit int in s15 to float in s15
+       vmov    r0, s15        // move s15 to result register
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/gedf2vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/gedf2vfp.S Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/arm/gedf2vfp.S Sat Dec 31 19:01:48 2011        
(r229135)
@@ -16,12 +16,13 @@
 // Uses Darwin calling convention where double precision arguments are passsed 
 // like in GPR pairs.
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__gedf2vfp)
-       fmdrr   d6, r0, r1      // load r0/r1 pair in double register
-       fmdrr   d7, r2, r3      // load r2/r3 pair in double register
-       fcmpd   d6, d7          
-       fmstat
+       vmov    d6, r0, r1      // load r0/r1 pair in double register
+       vmov    d7, r2, r3      // load r2/r3 pair in double register
+       vcmp.f64 d6, d7
+       vmrs    apsr_nzcv, fpscr
        movge   r0, #1      // set result register to 1 if greater than or equal
        movlt   r0, #0
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/gesf2vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/gesf2vfp.S Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/arm/gesf2vfp.S Sat Dec 31 19:01:48 2011        
(r229135)
@@ -16,12 +16,13 @@
 // Uses Darwin calling convention where single precision arguments are passsed 
 // like 32-bit ints
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__gesf2vfp)
-       fmsr    s14, r0     // move from GPR 0 to float register
-       fmsr    s15, r1     // move from GPR 1 to float register
-       fcmps   s14, s15
-       fmstat
+       vmov    s14, r0     // move from GPR 0 to float register
+       vmov    s15, r1     // move from GPR 1 to float register
+       vcmp.f32 s14, s15
+       vmrs    apsr_nzcv, fpscr
        movge   r0, #1      // set result register to 1 if greater than or equal
        movlt   r0, #0
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/gtdf2vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/gtdf2vfp.S Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/arm/gtdf2vfp.S Sat Dec 31 19:01:48 2011        
(r229135)
@@ -16,12 +16,13 @@
 // Uses Darwin calling convention where double precision arguments are passsed 
 // like in GPR pairs.
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__gtdf2vfp)
-       fmdrr   d6, r0, r1      // load r0/r1 pair in double register
-       fmdrr   d7, r2, r3      // load r2/r3 pair in double register
-       fcmpd   d6, d7          
-       fmstat
+       vmov    d6, r0, r1      // load r0/r1 pair in double register
+       vmov    d7, r2, r3      // load r2/r3 pair in double register
+       vcmp.f64 d6, d7
+       vmrs    apsr_nzcv, fpscr
        movgt   r0, #1          // set result register to 1 if equal
        movle   r0, #0
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/gtsf2vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/gtsf2vfp.S Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/arm/gtsf2vfp.S Sat Dec 31 19:01:48 2011        
(r229135)
@@ -16,12 +16,13 @@
 // Uses Darwin calling convention where single precision arguments are passsed 
 // like 32-bit ints
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__gtsf2vfp)
-       fmsr    s14, r0         // move from GPR 0 to float register
-       fmsr    s15, r1         // move from GPR 1 to float register
-       fcmps   s14, s15
-       fmstat
+       vmov    s14, r0         // move from GPR 0 to float register
+       vmov    s15, r1         // move from GPR 1 to float register
+       vcmp.f32 s14, s15
+       vmrs    apsr_nzcv, fpscr
        movgt   r0, #1          // set result register to 1 if equal
        movle   r0, #0
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/ledf2vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/ledf2vfp.S Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/arm/ledf2vfp.S Sat Dec 31 19:01:48 2011        
(r229135)
@@ -16,12 +16,13 @@
 // Uses Darwin calling convention where double precision arguments are passsed 
 // like in GPR pairs.
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__ledf2vfp)
-       fmdrr   d6, r0, r1      // load r0/r1 pair in double register
-       fmdrr   d7, r2, r3      // load r2/r3 pair in double register
-       fcmpd   d6, d7          
-       fmstat
+       vmov    d6, r0, r1      // load r0/r1 pair in double register
+       vmov    d7, r2, r3      // load r2/r3 pair in double register
+       vcmp.f64 d6, d7
+       vmrs    apsr_nzcv, fpscr
        movls   r0, #1          // set result register to 1 if equal
        movhi   r0, #0
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/lesf2vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/lesf2vfp.S Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/arm/lesf2vfp.S Sat Dec 31 19:01:48 2011        
(r229135)
@@ -16,12 +16,13 @@
 // Uses Darwin calling convention where single precision arguments are passsed 
 // like 32-bit ints
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__lesf2vfp)
-       fmsr    s14, r0     // move from GPR 0 to float register
-       fmsr    s15, r1     // move from GPR 1 to float register
-       fcmps   s14, s15
-       fmstat
+       vmov    s14, r0     // move from GPR 0 to float register
+       vmov    s15, r1     // move from GPR 1 to float register
+       vcmp.f32 s14, s15
+       vmrs    apsr_nzcv, fpscr
        movls   r0, #1      // set result register to 1 if equal
        movhi   r0, #0
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/ltdf2vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/ltdf2vfp.S Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/arm/ltdf2vfp.S Sat Dec 31 19:01:48 2011        
(r229135)
@@ -16,12 +16,13 @@
 // Uses Darwin calling convention where double precision arguments are passsed 
 // like in GPR pairs.
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__ltdf2vfp)
-       fmdrr   d6, r0, r1      // load r0/r1 pair in double register
-       fmdrr   d7, r2, r3      // load r2/r3 pair in double register
-       fcmpd   d6, d7          
-       fmstat
+       vmov    d6, r0, r1      // load r0/r1 pair in double register
+       vmov    d7, r2, r3      // load r2/r3 pair in double register
+       vcmp.f64 d6, d7
+       vmrs    apsr_nzcv, fpscr
        movmi   r0, #1          // set result register to 1 if equal
        movpl   r0, #0
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/ltsf2vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/ltsf2vfp.S Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/arm/ltsf2vfp.S Sat Dec 31 19:01:48 2011        
(r229135)
@@ -16,12 +16,13 @@
 // Uses Darwin calling convention where single precision arguments are passsed 
 // like 32-bit ints
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__ltsf2vfp)
-       fmsr    s14, r0     // move from GPR 0 to float register
-       fmsr    s15, r1     // move from GPR 1 to float register
-       fcmps   s14, s15
-       fmstat
+       vmov    s14, r0     // move from GPR 0 to float register
+       vmov    s15, r1     // move from GPR 1 to float register
+       vcmp.f32 s14, s15
+       vmrs    apsr_nzcv, fpscr
        movmi   r0, #1      // set result register to 1 if equal
        movpl   r0, #0
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/muldf3vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/muldf3vfp.S        Sat Dec 31 18:53:11 
2011        (r229134)
+++ head/contrib/compiler-rt/lib/arm/muldf3vfp.S        Sat Dec 31 19:01:48 
2011        (r229135)
@@ -15,10 +15,11 @@
 // Multiplies two double precision floating point numbers using the Darwin
 // calling convention where double arguments are passsed in GPR pairs
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__muldf3vfp)
-       fmdrr   d6, r0, r1              // move first param from r0/r1 pair 
into d6
-       fmdrr   d7, r2, r3              // move second param from r2/r3 pair 
into d7
-       fmuld   d6, d6, d7              
-       fmrrd   r0, r1, d6              // move result back to r0/r1 pair
+       vmov    d6, r0, r1         // move first param from r0/r1 pair into d6
+       vmov    d7, r2, r3         // move second param from r2/r3 pair into d7
+       vmul.f64 d6, d6, d7             
+       vmov    r0, r1, d6         // move result back to r0/r1 pair
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/mulsf3vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/mulsf3vfp.S        Sat Dec 31 18:53:11 
2011        (r229134)
+++ head/contrib/compiler-rt/lib/arm/mulsf3vfp.S        Sat Dec 31 19:01:48 
2011        (r229135)
@@ -15,10 +15,11 @@
 // Multiplies two single precision floating point numbers using the Darwin
 // calling convention where single arguments are passsed like 32-bit ints.
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__mulsf3vfp)
-       fmsr    s14, r0         // move first param from r0 into float register
-       fmsr    s15, r1         // move second param from r1 into float register
-       fmuls   s13, s14, s15
-       fmrs    r0, s13         // move result back to r0
+       vmov    s14, r0         // move first param from r0 into float register
+       vmov    s15, r1         // move second param from r1 into float register
+       vmul.f32 s13, s14, s15
+       vmov    r0, s13         // move result back to r0
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/nedf2vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/nedf2vfp.S Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/arm/nedf2vfp.S Sat Dec 31 19:01:48 2011        
(r229135)
@@ -16,12 +16,13 @@
 // Uses Darwin calling convention where double precision arguments are passsed 
 // like in GPR pairs.
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__nedf2vfp)
-       fmdrr   d6, r0, r1      // load r0/r1 pair in double register
-       fmdrr   d7, r2, r3      // load r2/r3 pair in double register
-       fcmpd   d6, d7          
-       fmstat
+       vmov    d6, r0, r1      // load r0/r1 pair in double register
+       vmov    d7, r2, r3      // load r2/r3 pair in double register
+       vcmp.f64 d6, d7         
+       vmrs    apsr_nzcv, fpscr
        movne   r0, #1          // set result register to 0 if unequal
        moveq   r0, #0
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/negdf2vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/negdf2vfp.S        Sat Dec 31 18:53:11 
2011        (r229134)
+++ head/contrib/compiler-rt/lib/arm/negdf2vfp.S        Sat Dec 31 19:01:48 
2011        (r229135)
@@ -15,6 +15,7 @@
 // Returns the negation a double precision floating point numbers using the 
 // Darwin calling convention where double arguments are passsed in GPR pairs.
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__negdf2vfp)
        eor     r1, r1, #-2147483648    // flip sign bit on double in r0/r1 pair

Modified: head/contrib/compiler-rt/lib/arm/negsf2vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/negsf2vfp.S        Sat Dec 31 18:53:11 
2011        (r229134)
+++ head/contrib/compiler-rt/lib/arm/negsf2vfp.S        Sat Dec 31 19:01:48 
2011        (r229135)
@@ -15,6 +15,7 @@
 // Returns the negation of a single precision floating point numbers using the 
 // Darwin calling convention where single arguments are passsed like 32-bit 
ints
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__negsf2vfp)
        eor     r0, r0, #-2147483648    // flip sign bit on float in r0

Modified: head/contrib/compiler-rt/lib/arm/nesf2vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/nesf2vfp.S Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/arm/nesf2vfp.S Sat Dec 31 19:01:48 2011        
(r229135)
@@ -16,12 +16,13 @@
 // Uses Darwin calling convention where single precision arguments are passsed 
 // like 32-bit ints
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__nesf2vfp)
-       fmsr    s14, r0     // move from GPR 0 to float register
-       fmsr    s15, r1     // move from GPR 1 to float register
-       fcmps   s14, s15
-       fmstat
+       vmov    s14, r0     // move from GPR 0 to float register
+       vmov    s15, r1     // move from GPR 1 to float register
+       vcmp.f32 s14, s15
+       vmrs    apsr_nzcv, fpscr
        movne   r0, #1      // set result register to 1 if unequal
        moveq   r0, #0
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/subdf3vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/subdf3vfp.S        Sat Dec 31 18:53:11 
2011        (r229134)
+++ head/contrib/compiler-rt/lib/arm/subdf3vfp.S        Sat Dec 31 19:01:48 
2011        (r229135)
@@ -15,10 +15,11 @@
 // Returns difference between two double precision floating point numbers 
using 
 // the Darwin calling convention where double arguments are passsed in GPR 
pairs
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__subdf3vfp)
-       fmdrr   d6, r0, r1              // move first param from r0/r1 pair 
into d6
-       fmdrr   d7, r2, r3              // move second param from r2/r3 pair 
into d7
-       fsubd   d6, d6, d7              
-       fmrrd   r0, r1, d6              // move result back to r0/r1 pair
+       vmov    d6, r0, r1         // move first param from r0/r1 pair into d6
+       vmov    d7, r2, r3         // move second param from r2/r3 pair into d7
+       vsub.f64 d6, d6, d7             
+       vmov    r0, r1, d6         // move result back to r0/r1 pair
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/subsf3vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/subsf3vfp.S        Sat Dec 31 18:53:11 
2011        (r229134)
+++ head/contrib/compiler-rt/lib/arm/subsf3vfp.S        Sat Dec 31 19:01:48 
2011        (r229135)
@@ -16,10 +16,11 @@
 // using the Darwin calling convention where single arguments are passsed
 // like 32-bit ints.
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__subsf3vfp)
-       fmsr    s14, r0         // move first param from r0 into float register
-       fmsr    s15, r1         // move second param from r1 into float register
-       fsubs   s14, s14, s15
-       fmrs    r0, s14         // move result back to r0
+       vmov    s14, r0         // move first param from r0 into float register
+       vmov    s15, r1         // move second param from r1 into float register
+       vsub.f32 s14, s14, s15
+       vmov    r0, s14         // move result back to r0
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/truncdfsf2vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/truncdfsf2vfp.S    Sat Dec 31 18:53:11 
2011        (r229134)
+++ head/contrib/compiler-rt/lib/arm/truncdfsf2vfp.S    Sat Dec 31 19:01:48 
2011        (r229135)
@@ -16,9 +16,10 @@
 // Uses Darwin calling convention where a double precision parameter is 
 // passed in a R0/R1 pair and a signle precision result is returned in R0.
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__truncdfsf2vfp)
-       fmdrr   d7, r0, r1   // load double from r0/r1 pair
-       fcvtsd  s15, d7      // convert double to single (trucate precision)
-       fmrs    r0, s15      // return result in r0
+       vmov    d7, r0, r1   // load double from r0/r1 pair
+       vcvt.f32.f64 s15, d7 // convert double to single (trucate precision)
+       vmov    r0, s15      // return result in r0
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/unorddf2vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/unorddf2vfp.S      Sat Dec 31 18:53:11 
2011        (r229134)
+++ head/contrib/compiler-rt/lib/arm/unorddf2vfp.S      Sat Dec 31 19:01:48 
2011        (r229135)
@@ -16,12 +16,13 @@
 // Uses Darwin calling convention where double precision arguments are passsed 
 // like in GPR pairs.
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__unorddf2vfp)
-       fmdrr   d6, r0, r1      // load r0/r1 pair in double register
-       fmdrr   d7, r2, r3      // load r2/r3 pair in double register
-       fcmpd   d6, d7          
-       fmstat
+       vmov    d6, r0, r1      // load r0/r1 pair in double register
+       vmov    d7, r2, r3      // load r2/r3 pair in double register
+       vcmp.f64 d6, d7         
+       vmrs    apsr_nzcv, fpscr
        movvs   r0, #1      // set result register to 1 if "overflow" (any NaNs)
        movvc   r0, #0
        bx      lr

Modified: head/contrib/compiler-rt/lib/arm/unordsf2vfp.S
==============================================================================
--- head/contrib/compiler-rt/lib/arm/unordsf2vfp.S      Sat Dec 31 18:53:11 
2011        (r229134)
+++ head/contrib/compiler-rt/lib/arm/unordsf2vfp.S      Sat Dec 31 19:01:48 
2011        (r229135)
@@ -16,12 +16,13 @@
 // Uses Darwin calling convention where single precision arguments are passsed 
 // like 32-bit ints
 //
+       .syntax unified
        .align 2
 DEFINE_COMPILERRT_FUNCTION(__unordsf2vfp)
-       fmsr    s14, r0     // move from GPR 0 to float register
-       fmsr    s15, r1     // move from GPR 1 to float register
-       fcmps   s14, s15
-       fmstat
+       vmov    s14, r0     // move from GPR 0 to float register
+       vmov    s15, r1     // move from GPR 1 to float register
+       vcmp.f32 s14, s15
+       vmrs    apsr_nzcv, fpscr
        movvs   r0, #1      // set result register to 1 if "overflow" (any NaNs)
        movvc   r0, #0
        bx      lr

Modified: head/contrib/compiler-rt/lib/ashldi3.c
==============================================================================
--- head/contrib/compiler-rt/lib/ashldi3.c      Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/ashldi3.c      Sat Dec 31 19:01:48 2011        
(r229135)
@@ -11,7 +11,6 @@
  *
  * ===----------------------------------------------------------------------===
  */
-#include "abi.h"
 
 #include "int_lib.h"
 

Modified: head/contrib/compiler-rt/lib/ashrdi3.c
==============================================================================
--- head/contrib/compiler-rt/lib/ashrdi3.c      Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/ashrdi3.c      Sat Dec 31 19:01:48 2011        
(r229135)
@@ -11,7 +11,6 @@
  *
  * ===----------------------------------------------------------------------===
  */
-#include "abi.h"
 
 #include "int_lib.h"
 

Modified: head/contrib/compiler-rt/lib/assembly.h
==============================================================================
--- head/contrib/compiler-rt/lib/assembly.h     Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/assembly.h     Sat Dec 31 19:01:48 2011        
(r229135)
@@ -35,15 +35,16 @@
 #define SYMBOL_NAME(name) GLUE(__USER_LABEL_PREFIX__, name)
 
 #ifdef VISIBILITY_HIDDEN
-#define DEFINE_COMPILERRT_FUNCTION(name)                   \
-  .globl SYMBOL_NAME(name) SEPARATOR                       \
-  HIDDEN_DIRECTIVE SYMBOL_NAME(name) SEPARATOR             \
-  SYMBOL_NAME(name):
+#define DECLARE_SYMBOL_VISIBILITY(name)                    \
+  HIDDEN_DIRECTIVE SYMBOL_NAME(name) SEPARATOR
 #else
+#define DECLARE_SYMBOL_VISIBILITY(name)
+#endif
+
 #define DEFINE_COMPILERRT_FUNCTION(name)                   \
   .globl SYMBOL_NAME(name) SEPARATOR                       \
+  DECLARE_SYMBOL_VISIBILITY(name)                          \
   SYMBOL_NAME(name):
-#endif
 
 #define DEFINE_COMPILERRT_PRIVATE_FUNCTION(name)           \
   .globl SYMBOL_NAME(name) SEPARATOR                       \

Modified: head/contrib/compiler-rt/lib/clear_cache.c
==============================================================================
--- head/contrib/compiler-rt/lib/clear_cache.c  Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/clear_cache.c  Sat Dec 31 19:01:48 2011        
(r229135)
@@ -9,7 +9,6 @@
  */
 
 #include "int_lib.h"
-#include <stdlib.h>
 
 #if __APPLE__
   #include <libkern/OSCacheControl.h>

Modified: head/contrib/compiler-rt/lib/clzdi2.c
==============================================================================
--- head/contrib/compiler-rt/lib/clzdi2.c       Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/clzdi2.c       Sat Dec 31 19:01:48 2011        
(r229135)
@@ -11,7 +11,6 @@
  *
  * ===----------------------------------------------------------------------===
  */
-#include "abi.h"
 
 #include "int_lib.h"
 

Modified: head/contrib/compiler-rt/lib/clzsi2.c
==============================================================================
--- head/contrib/compiler-rt/lib/clzsi2.c       Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/clzsi2.c       Sat Dec 31 19:01:48 2011        
(r229135)
@@ -11,7 +11,6 @@
  *
  * ===----------------------------------------------------------------------===
  */
-#include "abi.h"
 
 #include "int_lib.h"
 

Modified: head/contrib/compiler-rt/lib/cmpdi2.c
==============================================================================
--- head/contrib/compiler-rt/lib/cmpdi2.c       Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/cmpdi2.c       Sat Dec 31 19:01:48 2011        
(r229135)
@@ -11,7 +11,6 @@
  *
  * ===----------------------------------------------------------------------===
  */
-#include "abi.h"
 
 #include "int_lib.h"
 

Modified: head/contrib/compiler-rt/lib/ctzdi2.c
==============================================================================
--- head/contrib/compiler-rt/lib/ctzdi2.c       Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/ctzdi2.c       Sat Dec 31 19:01:48 2011        
(r229135)
@@ -11,7 +11,6 @@
  *
  * ===----------------------------------------------------------------------===
  */
-#include "abi.h"
 
 #include "int_lib.h"
 

Modified: head/contrib/compiler-rt/lib/ctzsi2.c
==============================================================================
--- head/contrib/compiler-rt/lib/ctzsi2.c       Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/ctzsi2.c       Sat Dec 31 19:01:48 2011        
(r229135)
@@ -11,7 +11,6 @@
  *
  * ===----------------------------------------------------------------------===
  */
-#include "abi.h"
 
 #include "int_lib.h"
 

Modified: head/contrib/compiler-rt/lib/divdc3.c
==============================================================================
--- head/contrib/compiler-rt/lib/divdc3.c       Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/divdc3.c       Sat Dec 31 19:01:48 2011        
(r229135)
@@ -13,8 +13,7 @@
  */
 
 #include "int_lib.h"
-#include <math.h>
-#include <complex.h>
+#include "int_math.h"
 
 /* Returns: the quotient of (a + ib) / (c + id) */
 
@@ -22,35 +21,37 @@ double _Complex
 __divdc3(double __a, double __b, double __c, double __d)
 {
     int __ilogbw = 0;
-    double __logbw = logb(fmax(fabs(__c), fabs(__d)));
-    if (isfinite(__logbw))
+    double __logbw = crt_logb(crt_fmax(crt_fabs(__c), crt_fabs(__d)));
+    if (crt_isfinite(__logbw))
     {
         __ilogbw = (int)__logbw;
-        __c = scalbn(__c, -__ilogbw);
-        __d = scalbn(__d, -__ilogbw);
+        __c = crt_scalbn(__c, -__ilogbw);
+        __d = crt_scalbn(__d, -__ilogbw);
     }
     double __denom = __c * __c + __d * __d;
     double _Complex z;
-    __real__ z = scalbn((__a * __c + __b * __d) / __denom, -__ilogbw);
-    __imag__ z = scalbn((__b * __c - __a * __d) / __denom, -__ilogbw);
-    if (isnan(__real__ z) && isnan(__imag__ z))
+    __real__ z = crt_scalbn((__a * __c + __b * __d) / __denom, -__ilogbw);
+    __imag__ z = crt_scalbn((__b * __c - __a * __d) / __denom, -__ilogbw);
+    if (crt_isnan(__real__ z) && crt_isnan(__imag__ z))
     {
-        if ((__denom == 0.0) && (!isnan(__a) || !isnan(__b)))
+        if ((__denom == 0.0) && (!crt_isnan(__a) || !crt_isnan(__b)))
         {
-            __real__ z = copysign(INFINITY, __c) * __a;
-            __imag__ z = copysign(INFINITY, __c) * __b;
+            __real__ z = crt_copysign(CRT_INFINITY, __c) * __a;
+            __imag__ z = crt_copysign(CRT_INFINITY, __c) * __b;
         }
-        else if ((isinf(__a) || isinf(__b)) && isfinite(__c) && isfinite(__d))
+        else if ((crt_isinf(__a) || crt_isinf(__b)) &&
+                 crt_isfinite(__c) && crt_isfinite(__d))
         {
-            __a = copysign(isinf(__a) ? 1.0 : 0.0, __a);
-            __b = copysign(isinf(__b) ? 1.0 : 0.0, __b);
-            __real__ z = INFINITY * (__a * __c + __b * __d);
-            __imag__ z = INFINITY * (__b * __c - __a * __d);
+            __a = crt_copysign(crt_isinf(__a) ? 1.0 : 0.0, __a);
+            __b = crt_copysign(crt_isinf(__b) ? 1.0 : 0.0, __b);
+            __real__ z = CRT_INFINITY * (__a * __c + __b * __d);
+            __imag__ z = CRT_INFINITY * (__b * __c - __a * __d);
         }
-        else if (isinf(__logbw) && __logbw > 0.0 && isfinite(__a) && 
isfinite(__b))
+        else if (crt_isinf(__logbw) && __logbw > 0.0 &&
+                 crt_isfinite(__a) && crt_isfinite(__b))
         {
-            __c = copysign(isinf(__c) ? 1.0 : 0.0, __c);
-            __d = copysign(isinf(__d) ? 1.0 : 0.0, __d);
+            __c = crt_copysign(crt_isinf(__c) ? 1.0 : 0.0, __c);
+            __d = crt_copysign(crt_isinf(__d) ? 1.0 : 0.0, __d);
             __real__ z = 0.0 * (__a * __c + __b * __d);
             __imag__ z = 0.0 * (__b * __c - __a * __d);
         }

Modified: head/contrib/compiler-rt/lib/divdf3.c
==============================================================================
--- head/contrib/compiler-rt/lib/divdf3.c       Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/divdf3.c       Sat Dec 31 19:01:48 2011        
(r229135)
@@ -15,7 +15,6 @@
 // underflow with correct rounding.
 //
 
//===----------------------------------------------------------------------===//
-#include "abi.h"
 
 #define DOUBLE_PRECISION
 #include "fp_lib.h"

Modified: head/contrib/compiler-rt/lib/divdi3.c
==============================================================================
--- head/contrib/compiler-rt/lib/divdi3.c       Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/divdi3.c       Sat Dec 31 19:01:48 2011        
(r229135)
@@ -11,7 +11,6 @@
  *
  * ===----------------------------------------------------------------------===
  */
-#include "abi.h"
 
 #include "int_lib.h"
 

Modified: head/contrib/compiler-rt/lib/divmoddi4.c
==============================================================================
--- head/contrib/compiler-rt/lib/divmoddi4.c    Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/divmoddi4.c    Sat Dec 31 19:01:48 2011        
(r229135)
@@ -11,7 +11,6 @@
  *
  * ===----------------------------------------------------------------------===
  */
-#include "abi.h"
 
 #include "int_lib.h"
 

Modified: head/contrib/compiler-rt/lib/divmodsi4.c
==============================================================================
--- head/contrib/compiler-rt/lib/divmodsi4.c    Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/divmodsi4.c    Sat Dec 31 19:01:48 2011        
(r229135)
@@ -11,7 +11,6 @@
  *
  * ===----------------------------------------------------------------------===
  */
-#include "abi.h"
 
 #include "int_lib.h"
 

Modified: head/contrib/compiler-rt/lib/divsc3.c
==============================================================================
--- head/contrib/compiler-rt/lib/divsc3.c       Sat Dec 31 18:53:11 2011        
(r229134)
+++ head/contrib/compiler-rt/lib/divsc3.c       Sat Dec 31 19:01:48 2011        
(r229135)
@@ -13,8 +13,7 @@
  */
 
 #include "int_lib.h"
-#include <math.h>
-#include <complex.h>
+#include "int_math.h"
 
 /* Returns: the quotient of (a + ib) / (c + id) */
 
@@ -22,35 +21,37 @@ float _Complex
 __divsc3(float __a, float __b, float __c, float __d)
 {
     int __ilogbw = 0;
-    float __logbw = logbf(fmaxf(fabsf(__c), fabsf(__d)));
-    if (isfinite(__logbw))
+    float __logbw = crt_logbf(crt_fmaxf(crt_fabsf(__c), crt_fabsf(__d)));
+    if (crt_isfinite(__logbw))
     {
         __ilogbw = (int)__logbw;
-        __c = scalbnf(__c, -__ilogbw);
-        __d = scalbnf(__d, -__ilogbw);
+        __c = crt_scalbnf(__c, -__ilogbw);
+        __d = crt_scalbnf(__d, -__ilogbw);
     }
     float __denom = __c * __c + __d * __d;
     float _Complex z;
-    __real__ z = scalbnf((__a * __c + __b * __d) / __denom, -__ilogbw);
-    __imag__ z = scalbnf((__b * __c - __a * __d) / __denom, -__ilogbw);
-    if (isnan(__real__ z) && isnan(__imag__ z))
+    __real__ z = crt_scalbnf((__a * __c + __b * __d) / __denom, -__ilogbw);
+    __imag__ z = crt_scalbnf((__b * __c - __a * __d) / __denom, -__ilogbw);
+    if (crt_isnan(__real__ z) && crt_isnan(__imag__ z))
     {
-        if ((__denom == 0) && (!isnan(__a) || !isnan(__b)))
+        if ((__denom == 0) && (!crt_isnan(__a) || !crt_isnan(__b)))
         {
-            __real__ z = copysignf(INFINITY, __c) * __a;
-            __imag__ z = copysignf(INFINITY, __c) * __b;
+            __real__ z = crt_copysignf(CRT_INFINITY, __c) * __a;
+            __imag__ z = crt_copysignf(CRT_INFINITY, __c) * __b;
         }

*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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