Author: avg
Date: Mon Sep  7 06:39:00 2020
New Revision: 365398
URL: https://svnweb.freebsd.org/changeset/base/365398

Log:
  Allwinner USB DRD support (musb_otg)
  
  Allwinner USB DRD is based on the Mentor USB OTG controller, with a
  different register layout and a few missing registers.
  
  The code is by Andrew Turner (andrew).
  
  Reviewed by:  hselasky, manu
  Obtained from:        andrew
  MFC after:    5 weeks
  Differential Revision: https://reviews.freebsd.org/D5881

Modified:
  head/sys/arm/allwinner/aw_usbphy.c
  head/sys/arm/allwinner/files.allwinner
  head/sys/arm64/conf/GENERIC
  head/sys/conf/files.arm64

Modified: head/sys/arm/allwinner/aw_usbphy.c
==============================================================================
--- head/sys/arm/allwinner/aw_usbphy.c  Mon Sep  7 06:32:03 2020        
(r365397)
+++ head/sys/arm/allwinner/aw_usbphy.c  Mon Sep  7 06:39:00 2020        
(r365398)
@@ -169,6 +169,18 @@ DEFINE_CLASS_1(awusbphy_phynode, awusbphy_phynode_clas
 #define        CLR4(res, o, m) WR4(res, o, RD4(res, o) & ~(m))
 #define        SET4(res, o, m) WR4(res, o, RD4(res, o) | (m))
 
+#define        PHY_CSR         0x00
+#define         ID_PULLUP_EN           (1 << 17)
+#define         DPDM_PULLUP_EN         (1 << 16)
+#define         FORCE_ID               (0x3 << 14)
+#define         FORCE_ID_SHIFT         14
+#define         FORCE_ID_LOW           2
+#define         FORCE_VBUS_VALID       (0x3 << 12)
+#define         FORCE_VBUS_VALID_SHIFT 12
+#define         FORCE_VBUS_VALID_HIGH  3
+#define         VBUS_CHANGE_DET        (1 << 6)
+#define         ID_CHANGE_DET          (1 << 5)
+#define         DPDM_CHANGE_DET        (1 << 4)
 #define        OTG_PHY_CFG     0x20
 #define         OTG_PHY_ROUTE_OTG      (1 << 0)
 #define        PMU_IRQ_ENABLE  0x00
@@ -214,6 +226,7 @@ awusbphy_init(device_t dev)
        struct awusbphy_softc *sc;
        phandle_t node;
        char pname[20];
+       uint32_t val;
        int error, off, rid;
        regulator_t reg;
        hwreset_t rst;
@@ -288,6 +301,16 @@ awusbphy_init(device_t dev)
                        return (ENXIO);
                }
        }
+
+       /* Enable OTG PHY for host mode */
+       val = bus_read_4(sc->phy_ctrl, PHY_CSR);
+       val &= ~(VBUS_CHANGE_DET | ID_CHANGE_DET | DPDM_CHANGE_DET);
+       val |= (ID_PULLUP_EN | DPDM_PULLUP_EN);
+       val &= ~FORCE_ID;
+       val |= (FORCE_ID_LOW << FORCE_ID_SHIFT);
+       val &= ~FORCE_VBUS_VALID;
+       val |= (FORCE_VBUS_VALID_HIGH << FORCE_VBUS_VALID_SHIFT);
+       bus_write_4(sc->phy_ctrl, PHY_CSR, val);
 
        return (0);
 }

Modified: head/sys/arm/allwinner/files.allwinner
==============================================================================
--- head/sys/arm/allwinner/files.allwinner      Mon Sep  7 06:32:03 2020        
(r365397)
+++ head/sys/arm/allwinner/files.allwinner      Mon Sep  7 06:39:00 2020        
(r365398)
@@ -27,6 +27,7 @@ dev/usb/controller/generic_ohci.c     optional        ohci
 dev/usb/controller/generic_usb_if.m    optional        ohci
 dev/usb/controller/generic_ehci.c      optional        ehci
 dev/usb/controller/generic_ehci_fdt.c  optional        ehci
+dev/usb/controller/musb_otg_allwinner.c        optional        musb
 arm/allwinner/aw_sid.c                 optional        aw_sid
 arm/allwinner/aw_thermal.c             optional        aw_thermal
 arm/allwinner/aw_cir.c                 optional        aw_cir evdev

Modified: head/sys/arm64/conf/GENERIC
==============================================================================
--- head/sys/arm64/conf/GENERIC Mon Sep  7 06:32:03 2020        (r365397)
+++ head/sys/arm64/conf/GENERIC Mon Sep  7 06:39:00 2020        (r365398)
@@ -222,6 +222,7 @@ device              aw_usbphy               # Allwinner USB 
PHY
 device         rk_usb2phy              # Rockchip USB2PHY
 device         rk_typec_phy            # Rockchip TypeC PHY
 device         dwcotg                  # DWC OTG controller
+device         musb                    # Mentor Graphics USB OTG controller
 device         ohci                    # OHCI USB interface
 device         ehci                    # EHCI USB interface (USB 2.0)
 device         ehci_mv                 # Marvell EHCI USB interface

Modified: head/sys/conf/files.arm64
==============================================================================
--- head/sys/conf/files.arm64   Mon Sep  7 06:32:03 2020        (r365397)
+++ head/sys/conf/files.arm64   Mon Sep  7 06:39:00 2020        (r365398)
@@ -339,6 +339,7 @@ dev/usb/controller/generic_ehci_acpi.c optional     ehci a
 dev/usb/controller/generic_ehci_fdt.c optional ehci fdt
 dev/usb/controller/generic_ohci.c optional     ohci fdt
 dev/usb/controller/generic_usb_if.m optional   ohci fdt
+dev/usb/controller/musb_otg_allwinner.c        optional musb fdt 
soc_allwinner_a64
 dev/usb/controller/usb_nop_xceiv.c     optional fdt ext_resources
 dev/usb/controller/generic_xhci.c      optional        xhci
 dev/usb/controller/generic_xhci_acpi.c optional        xhci acpi
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