Author: mjg
Date: Tue Sep 1 22:05:00 2020
New Revision: 365196
URL: https://svnweb.freebsd.org/changeset/base/365196
Log:
mxge: clean up empty lines in .c and .h files
Modified:
head/sys/dev/mxge/if_mxge.c
head/sys/dev/mxge/if_mxge_var.h
head/sys/dev/mxge/mcp_gen_header.h
head/sys/dev/mxge/mxge_eth_z8e.c
head/sys/dev/mxge/mxge_ethp_z8e.c
head/sys/dev/mxge/mxge_mcp.h
head/sys/dev/mxge/mxge_rss_eth_z8e.c
head/sys/dev/mxge/mxge_rss_ethp_z8e.c
Modified: head/sys/dev/mxge/if_mxge.c
==============================================================================
--- head/sys/dev/mxge/if_mxge.c Tue Sep 1 22:04:37 2020 (r365195)
+++ head/sys/dev/mxge/if_mxge.c Tue Sep 1 22:05:00 2020 (r365196)
@@ -159,7 +159,6 @@ mxge_probe(device_t dev)
{
int rev;
-
if ((pci_get_vendor(dev) == MXGE_PCI_VENDOR_MYRICOM) &&
((pci_get_device(dev) == MXGE_PCI_DEVICE_Z8E) ||
(pci_get_device(dev) == MXGE_PCI_DEVICE_Z8E_9))) {
@@ -201,7 +200,6 @@ mxge_enable_wc(mxge_softc_t *sc)
#endif
}
-
/* callback to get our DMA address */
static void
mxge_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs,
@@ -272,7 +270,6 @@ abort_with_dmat:
return err;
}
-
static void
mxge_dma_free(mxge_dma_t *dma)
{
@@ -351,7 +348,6 @@ mxge_enable_nvidia_ecrc(mxge_softc_t *sc)
uintptr_t bus, slot, func, ivend, idev;
uint32_t *ptr32;
-
if (!mxge_nvidia_ecrc_enable)
return;
@@ -427,7 +423,6 @@ mxge_enable_nvidia_ecrc(mxge_softc_t *sc)
/* map it into the kernel */
va = pmap_mapdev(trunc_page((vm_paddr_t)off), PAGE_SIZE);
-
if (va == NULL) {
device_printf(sc->dev, "pmap_kenter_temporary didn't\n");
@@ -473,7 +468,6 @@ mxge_enable_nvidia_ecrc(mxge_softc_t *sc)
}
#endif
-
static int
mxge_dma_test(mxge_softc_t *sc, int test_type)
{
@@ -483,7 +477,6 @@ mxge_dma_test(mxge_softc_t *sc, int test_type)
uint32_t len;
char *test = " ";
-
/* Run a small DMA test.
* The magic multipliers to the length tell the firmware
* to do DMA read, write, or read+write tests. The
@@ -657,7 +650,6 @@ static int
mxge_validate_firmware(mxge_softc_t *sc, const mcp_gen_header_t *hdr)
{
-
if (be32toh(hdr->mcp_type) != MCP_TYPE_ETH) {
device_printf(sc->dev, "Bad firmware type: 0x%x\n",
be32toh(hdr->mcp_type));
@@ -704,8 +696,6 @@ mxge_load_firmware_helper(mxge_softc_t *sc, uint32_t *
return ENOENT;
}
-
-
/* setup zlib and decompress f/w */
bzero(&zs, sizeof (zs));
zs.zalloc = zcalloc_nowait;
@@ -805,7 +795,6 @@ mxge_dummy_rdma(mxge_softc_t *sc, int enable)
buf[4] = htobe32(dma_low); /* dummy addr LSW */
buf[5] = htobe32(enable); /* enable? */
-
submit = (volatile char *)(sc->sram + MXGEFW_BOOT_DUMMY_RDMA);
mxge_pio_copy(submit, buf, 64);
@@ -946,7 +935,6 @@ mxge_adopt_running_firmware(mxge_softc_t *sc)
return status;
}
-
static int
mxge_load_firmware(mxge_softc_t *sc, int adopt)
{
@@ -1039,7 +1027,6 @@ mxge_update_mac_address(mxge_softc_t *sc)
uint8_t *addr = sc->mac_addr;
int status;
-
cmd.data0 = ((addr[0] << 24) | (addr[1] << 16)
| (addr[2] << 8) | addr[3]);
@@ -1133,10 +1120,10 @@ mxge_set_multicast_list(mxge_softc_t *sc)
" error status: %d\n", err);
return;
}
-
+
if (sc->adopted_rx_filter_bug)
return;
-
+
if (ifp->if_flags & IFF_ALLMULTI)
/* request to disable multicast filtering, so quit here */
return;
@@ -1211,7 +1198,6 @@ mxge_reset(mxge_softc_t *sc, int interrupts_setup)
mxge_dummy_rdma(sc, 1);
-
/* set the intrq size */
cmd.data0 = sc->rx_ring_size;
status = mxge_send_cmd(sc, MXGEFW_CMD_SET_INTRQ_SIZE, &cmd);
@@ -1226,7 +1212,7 @@ mxge_reset(mxge_softc_t *sc, int interrupts_setup)
* MXGEFW_CMD_SET_INTRQ_SIZE, since the intrq size is used by
* the firmware to compute offsets.
*/
-
+
if (sc->num_slices > 1) {
/* ask the maximum number of slices it supports */
status = mxge_send_cmd(sc, MXGEFW_CMD_GET_MAX_RSS_QUEUES,
@@ -1254,7 +1240,6 @@ mxge_reset(mxge_softc_t *sc, int interrupts_setup)
}
}
-
if (interrupts_setup) {
/* Now exchange information about interrupts */
for (slice = 0; slice < sc->num_slices; slice++) {
@@ -1271,14 +1256,12 @@ mxge_reset(mxge_softc_t *sc, int interrupts_setup)
status |= mxge_send_cmd(sc,
MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET, &cmd);
-
sc->intr_coal_delay_ptr = (volatile uint32_t *)(sc->sram + cmd.data0);
status |= mxge_send_cmd(sc, MXGEFW_CMD_GET_IRQ_ACK_OFFSET, &cmd);
irq_claim = (volatile uint32_t *)(sc->sram + cmd.data0);
-
status |= mxge_send_cmd(sc, MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET,
&cmd);
sc->irq_deassert = (volatile uint32_t *)(sc->sram + cmd.data0);
@@ -1286,11 +1269,9 @@ mxge_reset(mxge_softc_t *sc, int interrupts_setup)
device_printf(sc->dev, "failed set interrupt parameters\n");
return status;
}
-
*sc->intr_coal_delay_ptr = htobe32(sc->intr_coal_delay);
-
/* run a DMA benchmark */
(void) mxge_dma_test(sc, MXGEFW_DMA_TEST);
@@ -1355,7 +1336,7 @@ mxge_change_throttle(SYSCTL_HANDLER_ARGS)
if (throttle < MXGE_MIN_THROTTLE || throttle > MXGE_MAX_THROTTLE)
return EINVAL;
-
+
mtx_lock(&sc->driver_mtx);
cmd.data0 = throttle;
err = mxge_send_cmd(sc, MXGEFW_CMD_SET_THROTTLE_FACTOR, &cmd);
@@ -1387,7 +1368,7 @@ mxge_change_intr_coal(SYSCTL_HANDLER_ARGS)
mtx_lock(&sc->driver_mtx);
*sc->intr_coal_delay_ptr = htobe32(intr_coal_delay);
sc->intr_coal_delay = intr_coal_delay;
-
+
mtx_unlock(&sc->driver_mtx);
return err;
}
@@ -1504,7 +1485,6 @@ mxge_add_sysctls(mxge_softc_t *sc)
CTLFLAG_RD, &sc->watchdog_resets,
0, "Number of times NIC was reset");
-
/* performance related tunables */
SYSCTL_ADD_PROC(ctx, children, OID_AUTO,
"intr_coal_delay", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE,
@@ -1708,7 +1688,7 @@ mxge_submit_req(mxge_tx_ring_t *tx, mcp_kreq_ether_sen
mcp_kreq_ether_send_t *srcp;
volatile mcp_kreq_ether_send_t *dstp, *dst;
uint8_t last_flags;
-
+
idx = tx->req & tx->mask;
last_flags = src->flags;
@@ -1882,7 +1862,6 @@ mxge_encap_tso(struct mxge_slice_state *ss, struct mbu
}
flags = MXGEFW_FLAGS_TSO_HDR | MXGEFW_FLAGS_FIRST;
-
/* for TSO, pseudo_hdr_offset holds mss.
* The firmware figures out where to put
* the checksum by parsing the header. */
@@ -2063,7 +2042,6 @@ mxge_encap(struct mxge_slice_state *ss, struct mbuf *m
uint16_t pseudo_hdr_offset;
uint8_t flags, cksum_offset;
-
sc = ss->sc;
ifp = sc->ifp;
tx = &ss->tx;
@@ -2477,7 +2455,6 @@ mxge_csum_generic(uint16_t *raw, int len)
{
uint32_t csum;
-
csum = 0;
while (len > 0) {
csum += *raw;
@@ -2547,7 +2524,6 @@ mxge_rx_csum(struct mbuf *m, int csum)
#endif
uint16_t c, etype;
-
eh = mtod(m, struct ether_header *);
etype = ntohs(eh->ether_type);
switch (etype) {
@@ -2633,7 +2609,6 @@ mxge_vlan_tag_remove(struct mbuf *m, uint32_t *csum)
m_adj(m, ETHER_VLAN_ENCAP_LEN);
}
-
static inline void
mxge_rx_done_big(struct mxge_slice_state *ss, uint32_t len,
uint32_t csum, int lro)
@@ -2800,7 +2775,6 @@ mxge_clean_rx_done(struct mxge_slice_state *ss)
#endif
}
-
static inline void
mxge_tx_done(struct mxge_slice_state *ss, uint32_t mcp_idx)
{
@@ -2834,7 +2808,7 @@ mxge_tx_done(struct mxge_slice_state *ss, uint32_t mcp
tx->pkt_done++;
}
}
-
+
/* If we have space, clear IFF_OACTIVE to tell the stack that
its OK to send packets */
#ifdef IFNET_BUF_RING
@@ -2891,7 +2865,6 @@ static void
mxge_media_set(mxge_softc_t *sc, int media_type)
{
-
ifmedia_add(&sc->media, IFM_ETHER | IFM_FDX | media_type,
0, NULL);
ifmedia_set(&sc->media, IFM_ETHER | IFM_FDX | media_type);
@@ -3063,7 +3036,6 @@ mxge_intr(void *arg)
uint32_t send_done_count;
uint8_t valid;
-
#ifndef IFNET_BUF_RING
/* an interrupt on a non-zero slice is implicitly valid
since MSI-X irqs are not shared */
@@ -3147,15 +3119,12 @@ mxge_init(void *arg)
mxge_softc_t *sc = arg;
struct ifnet *ifp = sc->ifp;
-
mtx_lock(&sc->driver_mtx);
if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
(void) mxge_open(sc);
mtx_unlock(&sc->driver_mtx);
}
-
-
static void
mxge_free_slice_mbufs(struct mxge_slice_state *ss)
{
@@ -3211,7 +3180,6 @@ mxge_free_slice_rings(struct mxge_slice_state *ss)
{
int i;
-
if (ss->rx_done.entry != NULL)
mxge_dma_free(&ss->rx_done.dma);
ss->rx_done.entry = NULL;
@@ -3399,7 +3367,6 @@ mxge_alloc_slice_rings(struct mxge_slice_state *ss, in
ss->tx.mask = tx_ring_entries - 1;
ss->tx.max_desc = MIN(MXGE_MAX_SEND_DESC, tx_ring_entries / 4);
-
/* allocate the tx request copy block */
bytes = 8 +
sizeof (*ss->tx.req_list) * (ss->tx.max_desc + 4);
@@ -3416,7 +3383,7 @@ mxge_alloc_slice_rings(struct mxge_slice_state *ss, in
/* allocate the tx host info ring */
bytes = tx_ring_entries * sizeof (*ss->tx.info);
ss->tx.info = malloc(bytes, M_DEVBUF, M_ZERO|M_WAITOK);
-
+
/* allocate the tx busdma resources */
err = bus_dma_tag_create(sc->parent_dmat, /* parent */
1, /* alignment */
@@ -3430,7 +3397,7 @@ mxge_alloc_slice_rings(struct mxge_slice_state *ss, in
BUS_DMA_ALLOCNOW, /* flags */
NULL, NULL, /* lock */
&ss->tx.dmat); /* tag */
-
+
if (err != 0) {
device_printf(sc->dev, "Err %d allocating tx dmat\n",
err);
@@ -3459,7 +3426,7 @@ mxge_alloc_rings(mxge_softc_t *sc)
int tx_ring_size;
int tx_ring_entries, rx_ring_entries;
int err, slice;
-
+
/* get ring sizes */
err = mxge_send_cmd(sc, MXGEFW_CMD_GET_SEND_RING_SIZE, &cmd);
tx_ring_size = cmd.data0;
@@ -3489,7 +3456,6 @@ abort:
}
-
static void
mxge_choose_params(int mtu, int *big_buf_size, int *cl_size, int *nbufs)
{
@@ -3533,7 +3499,6 @@ mxge_slice_open(struct mxge_slice_state *ss, int nbufs
bus_dmamap_t map;
int err, i, slice;
-
sc = ss->sc;
slice = ss - sc->ss;
@@ -3541,7 +3506,7 @@ mxge_slice_open(struct mxge_slice_state *ss, int nbufs
(void)tcp_lro_init(&ss->lc);
#endif
ss->lc.ifp = sc->ifp;
-
+
/* get the lanai pointers to the send and receive rings */
err = 0;
@@ -3652,7 +3617,6 @@ mxge_open(mxge_softc_t *sc)
}
}
-
mxge_choose_params(sc->ifp->if_mtu, &big_bytes, &cl_size, &nbufs);
cmd.data0 = nbufs;
@@ -3746,7 +3710,6 @@ mxge_open(mxge_softc_t *sc)
return 0;
-
abort:
mxge_free_mbufs(sc);
@@ -3878,7 +3841,6 @@ mxge_watchdog_reset(mxge_softc_t *sc)
reboot);
running = sc->ifp->if_drv_flags & IFF_DRV_RUNNING;
if (running) {
-
/*
* quiesce NIC so that TX routines will not try to
* xmit after restoration of BAR
@@ -3945,7 +3907,6 @@ mxge_watchdog_task(void *arg, int pending)
{
mxge_softc_t *sc = arg;
-
mtx_lock(&sc->driver_mtx);
mxge_watchdog_reset(sc);
mtx_unlock(&sc->driver_mtx);
@@ -4096,7 +4057,6 @@ mxge_change_mtu(mxge_softc_t *sc, int mtu)
int real_mtu, old_mtu;
int err = 0;
-
real_mtu = mtu + ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN;
if ((real_mtu > sc->max_mtu) || real_mtu < 60)
return EINVAL;
@@ -4120,7 +4080,6 @@ static void
mxge_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
{
mxge_softc_t *sc = ifp->if_softc;
-
if (sc == NULL)
return;
@@ -4137,7 +4096,6 @@ mxge_fetch_i2c(mxge_softc_t *sc, struct ifi2creq *i2c)
uint32_t i2c_args;
int i, ms, err;
-
if (i2c->dev_addr != 0xA0 &&
i2c->dev_addr != 0xA2)
return (EINVAL);
@@ -4386,14 +4344,12 @@ mxge_fetch_tunables(mxge_softc_t *sc)
sc->throttle = mxge_throttle;
}
-
static void
mxge_free_slices(mxge_softc_t *sc)
{
struct mxge_slice_state *ss;
int i;
-
if (sc->ss == NULL)
return;
@@ -4434,7 +4390,7 @@ mxge_alloc_slices(mxge_softc_t *sc)
}
sc->rx_ring_size = cmd.data0;
max_intr_slots = 2 * (sc->rx_ring_size / sizeof (mcp_dma_addr_t));
-
+
bytes = sizeof (*sc->ss) * sc->num_slices;
sc->ss = malloc(bytes, M_DEVBUF, M_NOWAIT | M_ZERO);
if (sc->ss == NULL)
@@ -4497,7 +4453,7 @@ mxge_slice_probe(mxge_softc_t *sc)
* don't enable multiple slices if they are not enabled,
* or if this is not an SMP system
*/
-
+
if (mxge_max_slices == 0 || mxge_max_slices == 1 || mp_ncpus < 2)
return;
@@ -4517,7 +4473,7 @@ mxge_slice_probe(mxge_softc_t *sc)
device_printf(sc->dev, "Falling back to a single slice\n");
return;
}
-
+
/* try to send a reset command to the card to see if it
is alive */
memset(&cmd, 0, sizeof (cmd));
@@ -4569,7 +4525,7 @@ mxge_slice_probe(mxge_softc_t *sc)
if (mxge_verbose)
device_printf(sc->dev, "using %d slices\n",
sc->num_slices);
-
+
return;
abort_with_fw:
@@ -4666,7 +4622,6 @@ abort_with_intr:
}
free(sc->msix_ih, M_DEVBUF);
-
abort_with_res:
for (i = 0; i < sc->num_slices; i++) {
rid = i + 1;
@@ -4677,7 +4632,6 @@ abort_with_res:
}
free(sc->msix_irq_res, M_DEVBUF);
-
abort_with_msix:
pci_release_msi(sc->dev);
@@ -4783,7 +4737,7 @@ mxge_add_irq(mxge_softc_t *sc)
err = mxge_add_msix_irqs(sc);
else
err = mxge_add_single_irq(sc);
-
+
if (0 && err == 0 && sc->num_slices > 1) {
mxge_rem_msix_irqs(sc);
err = mxge_add_msix_irqs(sc);
@@ -4791,7 +4745,6 @@ mxge_add_irq(mxge_softc_t *sc)
return err;
}
-
static int
mxge_attach(device_t dev)
{
@@ -4849,7 +4802,7 @@ mxge_attach(device_t dev)
callout_init_mtx(&sc->co_hdl, &sc->driver_mtx, 0);
mxge_setup_cfg_space(sc);
-
+
/* Map the board into the kernel */
rid = PCIR_BARS;
sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
Modified: head/sys/dev/mxge/if_mxge_var.h
==============================================================================
--- head/sys/dev/mxge/if_mxge_var.h Tue Sep 1 22:04:37 2020
(r365195)
+++ head/sys/dev/mxge/if_mxge_var.h Tue Sep 1 22:05:00 2020
(r365196)
@@ -78,7 +78,7 @@ $FreeBSD$
#ifndef IFCAP_TSO
#define IFCAP_TSO 0
#endif
-
+
#ifndef IFCAP_TSO4
#define IFCAP_TSO4 0
#endif
@@ -118,7 +118,6 @@ typedef struct {
bus_dmamap_t map;
} mxge_dma_t;
-
typedef struct {
mcp_slot_t *entry;
mxge_dma_t dma;
@@ -324,7 +323,6 @@ struct mxge_pkt_info {
struct tcphdr *tcp;
};
-
static inline void
mxge_pio_copy(volatile void *to_v, void *from_v, size_t size)
{
@@ -346,7 +344,6 @@ void mxge_lro_flush(struct mxge_slice_state *ss, struc
int mxge_lro_rx(struct mxge_slice_state *ss, struct mbuf *m_head,
uint32_t csum);
-
/*
This file uses Myri10GE driver indentation.
Modified: head/sys/dev/mxge/mcp_gen_header.h
==============================================================================
--- head/sys/dev/mxge/mcp_gen_header.h Tue Sep 1 22:04:37 2020
(r365195)
+++ head/sys/dev/mxge/mcp_gen_header.h Tue Sep 1 22:05:00 2020
(r365196)
@@ -57,7 +57,6 @@ $FreeBSD$
};
*/
-
#define MCP_HEADER_PTR_OFFSET 0x3c
#define MCP_TYPE_MX 0x4d582020 /* "MX " */
@@ -65,7 +64,6 @@ $FreeBSD$
#define MCP_TYPE_ETH 0x45544820 /* "ETH " */
#define MCP_TYPE_MCP0 0x4d435030 /* "MCP0" */
-
typedef struct mcp_gen_header {
/* the first 4 fields are filled at compile time */
unsigned header_length;
@@ -99,6 +97,5 @@ typedef struct mcp_gen_header {
(unsigned int) STRING_SPECS, \
256 \
}
-
#endif /* _mcp_gen_header_h */
Modified: head/sys/dev/mxge/mxge_eth_z8e.c
==============================================================================
--- head/sys/dev/mxge/mxge_eth_z8e.c Tue Sep 1 22:04:37 2020
(r365195)
+++ head/sys/dev/mxge/mxge_eth_z8e.c Tue Sep 1 22:05:00 2020
(r365196)
@@ -44,4 +44,3 @@ static moduledata_t mxge_eth_z8e_fw_mod = {
DECLARE_MODULE(mxge_eth_z8e_fw, mxge_eth_z8e_fw_mod, SI_SUB_DRIVERS,
SI_ORDER_FIRST);
MODULE_VERSION(mxge_eth_z8e_fw, 1);
MODULE_DEPEND(mxge_eth_z8e_fw, firmware, 1, 1, 1);
-
Modified: head/sys/dev/mxge/mxge_ethp_z8e.c
==============================================================================
--- head/sys/dev/mxge/mxge_ethp_z8e.c Tue Sep 1 22:04:37 2020
(r365195)
+++ head/sys/dev/mxge/mxge_ethp_z8e.c Tue Sep 1 22:05:00 2020
(r365196)
@@ -44,4 +44,3 @@ static moduledata_t mxge_ethp_z8e_fw_mod = {
DECLARE_MODULE(mxge_ethp_z8e_fw, mxge_ethp_z8e_fw_mod, SI_SUB_DRIVERS,
SI_ORDER_FIRST);
MODULE_VERSION(mxge_ethp_z8e_fw, 1);
MODULE_DEPEND(mxge_ethp_z8e_fw, firmware, 1, 1, 1);
-
Modified: head/sys/dev/mxge/mxge_mcp.h
==============================================================================
--- head/sys/dev/mxge/mxge_mcp.h Tue Sep 1 22:04:37 2020
(r365195)
+++ head/sys/dev/mxge/mxge_mcp.h Tue Sep 1 22:05:00 2020
(r365196)
@@ -100,8 +100,6 @@ struct mcp_cmd_response {
};
typedef struct mcp_cmd_response mcp_cmd_response_t;
-
-
/*
flags used in mcp_kreq_ether_send_t:
@@ -117,7 +115,6 @@ typedef struct mcp_cmd_response mcp_cmd_response_t;
length of all previous segments was odd.
*/
-
#define MXGEFW_FLAGS_SMALL 0x1
#define MXGEFW_FLAGS_TSO_HDR 0x1
#define MXGEFW_FLAGS_FIRST 0x2
@@ -160,7 +157,6 @@ struct mcp_kreq_ether_recv {
};
typedef struct mcp_kreq_ether_recv mcp_kreq_ether_recv_t;
-
/* Commands */
#define MXGEFW_BOOT_HANDOFF 0xfc0000
@@ -189,7 +185,6 @@ enum myri10ge_mcp_cmd_type {
(may be available in the eeprom strings..? */
MXGEFW_GET_MCP_VERSION = 2,
-
/* Parameters which must be set by the driver before it can
issue MXGEFW_CMD_ETHERNET_UP. They persist until the next
MXGEFW_CMD_RESET is issued */
@@ -451,7 +446,6 @@ enum myri10ge_mcp_cmd_type {
};
typedef enum myri10ge_mcp_cmd_type myri10ge_mcp_cmd_type_t;
-
enum myri10ge_mcp_cmd_status {
MXGEFW_CMD_OK = 0,
MXGEFW_CMD_UNKNOWN = 1,
@@ -470,7 +464,6 @@ enum myri10ge_mcp_cmd_status {
MXGEFW_CMD_ERROR_BAD_PCIE_LINK = 14
};
typedef enum myri10ge_mcp_cmd_status myri10ge_mcp_cmd_status_t;
-
#define MXGEFW_OLD_IRQ_DATA_LEN 40
Modified: head/sys/dev/mxge/mxge_rss_eth_z8e.c
==============================================================================
--- head/sys/dev/mxge/mxge_rss_eth_z8e.c Tue Sep 1 22:04:37 2020
(r365195)
+++ head/sys/dev/mxge/mxge_rss_eth_z8e.c Tue Sep 1 22:05:00 2020
(r365196)
@@ -44,4 +44,3 @@ static moduledata_t mxge_rss_eth_z8e_fw_mod = {
DECLARE_MODULE(mxge_rss_eth_z8e_fw, mxge_rss_eth_z8e_fw_mod, SI_SUB_DRIVERS,
SI_ORDER_FIRST);
MODULE_VERSION(mxge_rss_eth_z8e_fw, 1);
MODULE_DEPEND(mxge_rss_eth_z8e_fw, firmware, 1, 1, 1);
-
Modified: head/sys/dev/mxge/mxge_rss_ethp_z8e.c
==============================================================================
--- head/sys/dev/mxge/mxge_rss_ethp_z8e.c Tue Sep 1 22:04:37 2020
(r365195)
+++ head/sys/dev/mxge/mxge_rss_ethp_z8e.c Tue Sep 1 22:05:00 2020
(r365196)
@@ -44,4 +44,3 @@ static moduledata_t mxge_rss_ethp_z8e_fw_mod = {
DECLARE_MODULE(mxge_rss_ethp_z8e_fw, mxge_rss_ethp_z8e_fw_mod, SI_SUB_DRIVERS,
SI_ORDER_FIRST);
MODULE_VERSION(mxge_rss_ethp_z8e_fw, 1);
MODULE_DEPEND(mxge_rss_ethp_z8e_fw, firmware, 1, 1, 1);
-
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