Author: mjg
Date: Tue Sep 1 21:57:33 2020
New Revision: 365169
URL: https://svnweb.freebsd.org/changeset/base/365169
Log:
qlnx: clean up empty lines in .c and .h files
Modified:
head/sys/dev/qlnx/qlnxe/bcm_osal.h
head/sys/dev/qlnx/qlnxe/common_hsi.h
head/sys/dev/qlnx/qlnxe/ecore_cxt.c
head/sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
head/sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
head/sys/dev/qlnx/qlnxe/ecore_dbg_values.h
head/sys/dev/qlnx/qlnxe/ecore_dev.c
head/sys/dev/qlnx/qlnxe/ecore_fcoe.h
head/sys/dev/qlnx/qlnxe/ecore_hsi_common.h
head/sys/dev/qlnx/qlnxe/ecore_hsi_debug_tools.h
head/sys/dev/qlnx/qlnxe/ecore_hsi_eth.h
head/sys/dev/qlnx/qlnxe/ecore_hsi_fcoe.h
head/sys/dev/qlnx/qlnxe/ecore_hsi_init_func.h
head/sys/dev/qlnx/qlnxe/ecore_hsi_init_tool.h
head/sys/dev/qlnx/qlnxe/ecore_hsi_iscsi.h
head/sys/dev/qlnx/qlnxe/ecore_hsi_iwarp.h
head/sys/dev/qlnx/qlnxe/ecore_hsi_rdma.h
head/sys/dev/qlnx/qlnxe/ecore_hsi_roce.h
head/sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
head/sys/dev/qlnx/qlnxe/ecore_init_ops.c
head/sys/dev/qlnx/qlnxe/ecore_init_ops.h
head/sys/dev/qlnx/qlnxe/ecore_int.c
head/sys/dev/qlnx/qlnxe/ecore_int.h
head/sys/dev/qlnx/qlnxe/ecore_iov_api.h
head/sys/dev/qlnx/qlnxe/ecore_iscsi.h
head/sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
head/sys/dev/qlnx/qlnxe/ecore_iwarp.c
head/sys/dev/qlnx/qlnxe/ecore_l2.c
head/sys/dev/qlnx/qlnxe/ecore_l2.h
head/sys/dev/qlnx/qlnxe/ecore_ll2.c
head/sys/dev/qlnx/qlnxe/ecore_mcp.c
head/sys/dev/qlnx/qlnxe/ecore_mcp.h
head/sys/dev/qlnx/qlnxe/ecore_mng_tlv.c
head/sys/dev/qlnx/qlnxe/ecore_ooo.h
head/sys/dev/qlnx/qlnxe/ecore_proto_if.h
head/sys/dev/qlnx/qlnxe/ecore_rdma.c
head/sys/dev/qlnx/qlnxe/ecore_rdma.h
head/sys/dev/qlnx/qlnxe/ecore_roce.c
head/sys/dev/qlnx/qlnxe/ecore_roce_api.h
head/sys/dev/qlnx/qlnxe/ecore_rt_defs.h
head/sys/dev/qlnx/qlnxe/ecore_sp_api.h
head/sys/dev/qlnx/qlnxe/ecore_sp_commands.c
head/sys/dev/qlnx/qlnxe/ecore_sp_commands.h
head/sys/dev/qlnx/qlnxe/ecore_spq.c
head/sys/dev/qlnx/qlnxe/ecore_sriov.c
head/sys/dev/qlnx/qlnxe/ecore_status.h
head/sys/dev/qlnx/qlnxe/ecore_tcp_ip.h
head/sys/dev/qlnx/qlnxe/ecore_vf.c
head/sys/dev/qlnx/qlnxe/ecore_vf.h
head/sys/dev/qlnx/qlnxe/ecore_vf_api.h
head/sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
head/sys/dev/qlnx/qlnxe/eth_common.h
head/sys/dev/qlnx/qlnxe/fcoe_common.h
head/sys/dev/qlnx/qlnxe/iscsi_common.h
head/sys/dev/qlnx/qlnxe/mcp_private.h
head/sys/dev/qlnx/qlnxe/mcp_public.h
head/sys/dev/qlnx/qlnxe/mfw_hsi.h
head/sys/dev/qlnx/qlnxe/nvm_cfg.h
head/sys/dev/qlnx/qlnxe/nvm_map.h
head/sys/dev/qlnx/qlnxe/pcics_reg_driver.h
head/sys/dev/qlnx/qlnxe/qlnx_def.h
head/sys/dev/qlnx/qlnxe/qlnx_ioctl.c
head/sys/dev/qlnx/qlnxe/qlnx_ioctl.h
head/sys/dev/qlnx/qlnxe/qlnx_os.c
head/sys/dev/qlnx/qlnxe/qlnx_os.h
head/sys/dev/qlnx/qlnxe/qlnx_rdma.c
head/sys/dev/qlnx/qlnxe/qlnx_rdma.h
head/sys/dev/qlnx/qlnxe/qlnx_ver.h
head/sys/dev/qlnx/qlnxe/rdma_common.h
head/sys/dev/qlnx/qlnxe/roce_common.h
head/sys/dev/qlnx/qlnxe/spad_layout.h
head/sys/dev/qlnx/qlnxe/storage_common.h
head/sys/dev/qlnx/qlnxe/tcp_common.h
head/sys/dev/qlnx/qlnxr/qlnxr_cm.c
head/sys/dev/qlnx/qlnxr/qlnxr_cm.h
head/sys/dev/qlnx/qlnxr/qlnxr_def.h
head/sys/dev/qlnx/qlnxr/qlnxr_os.c
head/sys/dev/qlnx/qlnxr/qlnxr_roce.h
head/sys/dev/qlnx/qlnxr/qlnxr_user.h
head/sys/dev/qlnx/qlnxr/qlnxr_verbs.c
head/sys/dev/qlnx/qlnxr/qlnxr_verbs.h
Modified: head/sys/dev/qlnx/qlnxe/bcm_osal.h
==============================================================================
--- head/sys/dev/qlnx/qlnxe/bcm_osal.h Tue Sep 1 21:57:15 2020
(r365168)
+++ head/sys/dev/qlnx/qlnxe/bcm_osal.h Tue Sep 1 21:57:33 2020
(r365169)
@@ -92,7 +92,6 @@ extern void qlnx_get_protocol_stats(void *cdev, int pr
extern void qlnx_sp_isr(void *arg);
-
extern void qlnx_osal_vf_fill_acquire_resc_req(void *p_hwfn, void *p_resc_req,
void *p_sw_info);
extern void qlnx_osal_iov_vf_cleanup(void *p_hwfn, uint8_t relative_vf_id);
@@ -126,7 +125,7 @@ is_power_of_2(unsigned long n)
{
return (n == roundup_pow_of_two(n));
}
-
+
static __inline unsigned long
rounddown_pow_of_two(unsigned long x)
{
@@ -345,7 +344,6 @@ do {
\
} \
} while (0)
-
#define OSAL_LIST_IS_EMPTY(list) \
((list)->cnt == 0)
@@ -364,7 +362,6 @@ do {
\
entry = (type *)tmp_entry, \
tmp_entry = (entry) ? OSAL_LIST_NEXT(entry, field, type) : NULL)
-
#define OSAL_BAR_SIZE(dev, bar_id) qlnx_pci_bus_get_bar_size(dev, bar_id)
#define OSAL_PCI_READ_CONFIG_BYTE(dev, reg, value) \
@@ -440,7 +437,6 @@ qlnx_log2(uint32_t x)
#define OSAL_UNLIKELY
#define OSAL_NULL NULL
-
#define OSAL_MAX_T(type, __max1, __max2) max_t(type, __max1, __max2)
#define OSAL_MIN_T(type, __max1, __max2) min_t(type, __max1, __max2)
@@ -512,7 +508,6 @@ bitmap_weight(unsigned long *bitmap, unsigned nbits)
}
#endif
-
#define OSAL_TEST_AND_FLIP_BIT qlnx_test_and_change_bit
#define OSAL_TEST_AND_CLEAR_BIT test_and_clear_bit
Modified: head/sys/dev/qlnx/qlnxe/common_hsi.h
==============================================================================
--- head/sys/dev/qlnx/qlnxe/common_hsi.h Tue Sep 1 21:57:15 2020
(r365168)
+++ head/sys/dev/qlnx/qlnxe/common_hsi.h Tue Sep 1 21:57:33 2020
(r365169)
@@ -72,7 +72,6 @@
#define ETH_MAX_NUM_RX_QUEUES_PER_VF_DOUBLE 48 /*Maximum number of RX
queues that can be allocated to VF with doubled VF zone size. Up to 96 VF
supported in this mode*/
#define ETH_MAX_NUM_RX_QUEUES_PER_VF_QUAD 112 /*Maximum number of RX
queues that can be allocated to VF with 4 VF zone size. Up to 48 VF supported
in this mode*/
-
/********************************/
/* CORE (LIGHT L2) FW CONSTANTS */
/********************************/
@@ -97,12 +96,10 @@
#define MAX_NUM_LL2_RX_QUEUES 48
#define MAX_NUM_LL2_TX_STATS_COUNTERS 48
-
///////////////////////////////////////////////////////////////////////////////////////////////////
// Include firmware verison number only- do not add constants here to avoid
redundunt compilations
///////////////////////////////////////////////////////////////////////////////////////////////////
-
#define FW_MAJOR_VERSION 8
#define FW_MINOR_VERSION 33
#define FW_REVISION_VERSION 7
@@ -196,7 +193,6 @@
#define CDU_CONTEXT_VALIDATION_CFG_USE_CID
(4)
#define CDU_CONTEXT_VALIDATION_CFG_USE_ACTIVE
(5)
-
/*****************/
/* DQ CONSTANTS */
/*****************/
@@ -412,12 +408,10 @@
#define PIS_PER_SB_E5 8
#define MAX_PIS_PER_SB OSAL_MAX_T(PIS_PER_SB_E4,PIS_PER_SB_E5)
-
#define CAU_HC_STOPPED_STATE 3 /* fsm is
stopped or not valid for this sb */
#define CAU_HC_DISABLE_STATE 4 /* fsm is
working without interrupt coalescing for this sb*/
#define CAU_HC_ENABLE_STATE 0 /* fsm
is working with interrupt coalescing for this sb*/
-
/*****************/
/* IGU CONSTANTS */
/*****************/
@@ -594,12 +588,10 @@
#define PXP_NUM_ILT_RECORDS_E5 13664
-
// Host Interface
#define PXP_QUEUES_ZONE_MAX_NUM_E4 320
#define PXP_QUEUES_ZONE_MAX_NUM_E5 512
-
/*****************/
/* PRM CONSTANTS */
/*****************/
@@ -608,7 +600,6 @@
/* SDMs CONSTANTS */
/*****************/
-
#define SDM_OP_GEN_TRIG_NONE 0
#define SDM_OP_GEN_TRIG_WAKE_THREAD 1
#define SDM_OP_GEN_TRIG_AGG_INT 2
@@ -660,14 +651,12 @@ struct coalescing_timeset
#define COALESCING_TIMESET_VALID_SHIFT 7
};
-
struct common_queue_zone
{
__le16 ring_drv_data_consumer;
__le16 reserved;
};
-
/*
* ETH Rx producers data
*/
@@ -677,7 +666,6 @@ struct eth_rx_prod_data
__le16 cqe_prod /* CQE producer. */;
};
-
struct tcp_ulp_connect_done_params
{
__le16 mss;
@@ -696,7 +684,6 @@ struct iscsi_connect_done_results
struct tcp_ulp_connect_done_params params /* decided tcp params after
connect done */;
};
-
struct iscsi_eqe_data
{
__le16 icid /* Context ID of the connection */;
@@ -712,7 +699,6 @@ struct iscsi_eqe_data
#define ISCSI_EQE_DATA_RESERVED0_SHIFT 7
};
-
/*
* Multi function mode
*/
@@ -724,7 +710,6 @@ enum mf_mode
MAX_MF_MODE
};
-
/*
* Per-protocol connection types
*/
@@ -743,7 +728,6 @@ enum protocol_type
MAX_PROTOCOL_TYPE
};
-
struct regpair
{
__le32 lo /* low word for reg-pair */;
@@ -768,9 +752,6 @@ union rdma_eqe_data
struct rdma_eqe_destroy_qp rdma_destroy_qp_data /* RoCE Destroy Event
Data */;
};
-
-
-
/*
* Ustorm Queue Zone
*/
@@ -780,14 +761,12 @@ struct ustorm_eth_queue_zone
u8 reserved[3];
};
-
struct ustorm_queue_zone
{
struct ustorm_eth_queue_zone eth;
struct common_queue_zone common;
};
-
/*
* status block structure
*/
@@ -804,7 +783,6 @@ struct cau_pi_entry
#define CAU_PI_ENTRY_RESERVED_SHIFT 24
};
-
/*
* status block structure
*/
@@ -836,7 +814,6 @@ struct cau_sb_entry
#define CAU_SB_ENTRY_TPH_SHIFT 31
};
-
/*
* Igu cleanup bit values to distinguish between clean or producer consumer
update.
*/
@@ -847,7 +824,6 @@ enum command_type_bit
MAX_COMMAND_TYPE_BIT
};
-
/*
* core doorbell data
*/
@@ -868,7 +844,6 @@ struct core_db_data
__le16 spq_prod;
};
-
/*
* Enum of doorbell aggregative command selection
*/
@@ -881,7 +856,6 @@ enum db_agg_cmd_sel
MAX_DB_AGG_CMD_SEL
};
-
/*
* Enum of doorbell destination
*/
@@ -894,7 +868,6 @@ enum db_dest
MAX_DB_DEST
};
-
/*
* Enum of doorbell DPM types
*/
@@ -907,7 +880,6 @@ enum db_dpm_type
MAX_DB_DPM_TYPE
};
-
/*
* Structure for doorbell data, in L2 DPM mode, for the first doorbell in a
DPM burst
*/
@@ -932,7 +904,6 @@ struct db_l2_dpm_data
#define DB_L2_DPM_DATA_GFS_SRC_EN_SHIFT 31
};
-
/*
* Structure for SGE in a DPM doorbell of type DPM_L2_BD
*/
@@ -952,7 +923,6 @@ struct db_l2_dpm_sge
__le32 reserved2;
};
-
/*
* Structure for doorbell address, in legacy mode
*/
@@ -967,7 +937,6 @@ struct db_legacy_addr
#define DB_LEGACY_ADDR_ICID_SHIFT 5
};
-
/*
* Structure for doorbell address, in PWM mode
*/
@@ -986,7 +955,6 @@ struct db_pwm_addr
#define DB_PWM_ADDR_RESERVED1_SHIFT 28
};
-
/*
* Parameters to RDMA firmware, passed in EDPM doorbell
*/
@@ -1023,8 +991,6 @@ struct db_rdma_dpm_data
struct db_rdma_dpm_params params /* parametes passed to RDMA firmware
*/;
};
-
-
/*
* Igu interrupt command
*/
@@ -1037,7 +1003,6 @@ enum igu_int_cmd
MAX_IGU_INT_CMD
};
-
/*
* IGU producer or consumer update command
*/
@@ -1061,7 +1026,6 @@ struct igu_prod_cons_update
__le32 reserved1;
};
-
/*
* Igu segments access for default status block only
*/
@@ -1072,7 +1036,6 @@ enum igu_seg_access
MAX_IGU_SEG_ACCESS
};
-
/*
* Enumeration for L3 type field of parsing_and_err_flags. L3Type: 0 - unknown
(not ip) ,1 - Ipv4, 2 - Ipv6 (this field can be filled according to the
last-ethertype)
*/
@@ -1084,7 +1047,6 @@ enum l3_type
MAX_L3_TYPE
};
-
/*
* Enumeration for l4Protocol field of parsing_and_err_flags. L4-protocol 0 -
none, 1 - TCP, 2- UDP. if the packet is IPv4 fragment, and its not the first
fragment, the protocol-type should be set to none.
*/
@@ -1096,7 +1058,6 @@ enum l4_protocol
MAX_L4_PROTOCOL
};
-
/*
* Parsing and error flags field.
*/
@@ -1133,7 +1094,6 @@ struct parsing_and_err_flags
#define PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT 15
};
-
/*
* Parsing error flags bitmap.
*/
@@ -1174,7 +1134,6 @@ struct parsing_err_flags
#define PARSING_ERR_FLAGS_TUNNEL_L4_CHKSM_ERROR_SHIFT 15
};
-
/*
* Pb context
*/
@@ -1183,7 +1142,6 @@ struct pb_context
__le32 crc[4];
};
-
/*
* Concrete Function ID.
*/
@@ -1202,7 +1160,6 @@ struct pxp_concrete_fid
#define PXP_CONCRETE_FID_VFID_SHIFT 8
};
-
/*
* Concrete Function ID.
*/
@@ -1255,9 +1212,6 @@ struct pxp_pretend_cmd
#define PXP_PRETEND_CMD_IS_CONCRETE_SHIFT 15
};
-
-
-
/*
* PTT Record in PXP Admin Window.
*/
@@ -1271,7 +1225,6 @@ struct pxp_ptt_entry
struct pxp_pretend_cmd pretend;
};
-
/*
* VF Zone A Permission Register.
*/
@@ -1288,7 +1241,6 @@ struct pxp_vf_zone_a_permission
#define PXP_VF_ZONE_A_PERMISSION_RESERVED1_SHIFT 16
};
-
/*
* Rdif context
*/
@@ -1359,8 +1311,6 @@ struct rdif_task_context
__le32 reserved2;
};
-
-
/*
* status block structure
*/
@@ -1381,7 +1331,6 @@ struct status_block_e4
#define STATUS_BLOCK_E4_ZERO_PAD3_SHIFT 24
};
-
/*
* status block structure
*/
@@ -1402,7 +1351,6 @@ struct status_block_e5
#define STATUS_BLOCK_E5_ZERO_PAD3_SHIFT 24
};
-
/*
* Tdif context
*/
@@ -1489,7 +1437,6 @@ struct tdif_task_context
u8 partial_dif_data_b[8];
};
-
/*
* Timers context
*/
@@ -1538,7 +1485,6 @@ struct timers_context
#define TIMERS_CONTEXT_RESERVED7_MASK 0x7
#define TIMERS_CONTEXT_RESERVED7_SHIFT 29
};
-
/*
* Enum for next_protocol field of tunnel_parsing_flags / tunnelTypeDesc
Modified: head/sys/dev/qlnx/qlnxe/ecore_cxt.c
==============================================================================
--- head/sys/dev/qlnx/qlnxe/ecore_cxt.c Tue Sep 1 21:57:15 2020
(r365168)
+++ head/sys/dev/qlnx/qlnxe/ecore_cxt.c Tue Sep 1 21:57:33 2020
(r365169)
@@ -1062,7 +1062,6 @@ t2_fail:
continue; \
} else \
-
/* Total number of ILT lines used by this PF */
static u32 ecore_cxt_ilt_shadow_size(struct ecore_ilt_client_cfg *ilt_clients)
{
@@ -1590,7 +1589,6 @@ static void ecore_cdu_init_pf(struct ecore_hwfn *p_hwf
SET_FIELD(cdu_seg_params, CDU_SEG_REG_OFFSET, offset);
STORE_RT_REG(p_hwfn, rt_type_offset_fl_arr[i],
cdu_seg_params);
-
}
}
Modified: head/sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
==============================================================================
--- head/sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c Tue Sep 1 21:57:15
2020 (r365168)
+++ head/sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c Tue Sep 1 21:57:33
2020 (r365169)
@@ -194,7 +194,6 @@ static u32 (*cond_arr[])(const u32 *r, const u32 *imm)
#endif /* __PREVENT_COND_ARR__ */
-
/******************************* Data Types **********************************/
enum platform_ids {
@@ -540,7 +539,6 @@ struct phy_defs {
#define EMPTY_FW_VERSION_STR "???_???_???_???"
#define EMPTY_FW_IMAGE_STR "???????????????"
-
/***************************** Constant Arrays *******************************/
struct dbg_array {
@@ -553,7 +551,6 @@ struct dbg_array {
static struct dbg_array s_dbg_arrays[MAX_BIN_DBG_BUFFER_TYPE] = { { OSAL_NULL
} };
#else
static struct dbg_array s_dbg_arrays[MAX_BIN_DBG_BUFFER_TYPE] = {
-
/* BIN_BUF_DBG_MODE_TREE */
{ (const u32 *)dbg_modes_tree_buf, OSAL_ARRAY_SIZE(dbg_modes_tree_buf)},
@@ -651,7 +648,6 @@ static struct chip_defs s_chip_defs[MAX_CHIP_IDS] = {
/* Storm constant definitions array */
static struct storm_defs s_storm_defs[] = {
-
/* Tstorm */
{ 'T', BLOCK_TSEM,
{ DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT
}, true,
@@ -1405,7 +1401,6 @@ static struct block_defs block_bar0_map_defs = {
0, 0, 0, 0, 0,
false, false, MAX_DBG_RESET_REGS, 0 };
-
static struct block_defs* s_block_defs[MAX_BLOCK_ID] = {
&block_grc_defs,
&block_miscs_defs,
@@ -1498,10 +1493,8 @@ static struct block_defs* s_block_defs[MAX_BLOCK_ID] =
};
-
/* Constraint operation types */
static struct dbg_bus_constraint_op_defs s_constraint_op_defs[] = {
-
/* DBG_BUS_CONSTRAINT_OP_EQ */
{ 0, false },
@@ -1534,7 +1527,6 @@ static struct dbg_bus_constraint_op_defs s_constraint_
};
static const char* s_dbg_target_names[] = {
-
/* DBG_BUS_TARGET_ID_INT_BUF */
"int-buf",
@@ -1546,7 +1538,6 @@ static const char* s_dbg_target_names[] = {
};
static struct storm_mode_defs s_storm_mode_defs[] = {
-
/* DBG_BUS_STORM_MODE_PRINTF */
{ "printf", true, 0 },
@@ -1576,7 +1567,6 @@ static struct storm_mode_defs s_storm_mode_defs[] = {
};
static struct platform_defs s_platform_defs[] = {
-
/* PLATFORM_ASIC */
{ "asic", 1, 256, 32768 },
@@ -1591,7 +1581,6 @@ static struct platform_defs s_platform_defs[] = {
};
static struct grc_param_defs s_grc_param_defs[] = {
-
/* DBG_GRC_PARAM_DUMP_TSTORM */
{ { 1, 1, 1 }, 0, 1, false, 1, 1 },
@@ -1755,7 +1744,6 @@ static struct big_ram_defs s_big_ram_defs[] = {
};
static struct reset_reg_defs s_reset_regs_defs[] = {
-
/* DBG_RESET_REG_MISCS_PL_UA */
{ MISCS_REG_RESET_PL_UA, { true, true, true }, { 0x0, 0x0, 0x0 } },
@@ -2308,7 +2296,6 @@ static void ecore_bus_enable_storm(struct ecore_hwfn *
/* Config SEM */
if (storm_mode->is_fast_dbg) {
-
/* Enable fast debug */
ecore_wr(p_hwfn, p_ptt, storm->sem_frame_mode_addr,
DBG_BUS_SEMI_FRAME_MODE_0SLOW_4FAST);
ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_DEBUG_MODE,
storm_mode->id_in_hw);
@@ -2323,7 +2310,6 @@ static void ecore_bus_enable_storm(struct ecore_hwfn *
ecore_wr(p_hwfn, p_ptt, base_addr +
SEM_FAST_REG_DBG_MODE6_SRC_DISABLE, SEM_FAST_MODE6_SRC_ENABLE_VAL);
}
else {
-
/* Enable slow debug */
ecore_wr(p_hwfn, p_ptt, storm->sem_frame_mode_addr,
DBG_BUS_SEMI_FRAME_MODE_4SLOW_0FAST);
ecore_wr(p_hwfn, p_ptt, storm->sem_slow_enable_addr, 1);
@@ -2521,7 +2507,6 @@ static u32 ecore_bus_dump_int_buf(struct ecore_hwfn *p
last_written_line = ecore_rd(p_hwfn, p_ptt, DBG_REG_INTR_BUFFER_WR_PTR);
if (ecore_rd(p_hwfn, p_ptt, DBG_REG_WRAP_ON_INT_BUFFER)) {
-
/* Internal buffer was wrapped: first dump from write pointer
* to buffer end, then dump from buffer start to write pointer.
*/
@@ -2530,7 +2515,6 @@ static u32 ecore_bus_dump_int_buf(struct ecore_hwfn *p
offset += ecore_bus_dump_int_buf_range(p_hwfn, p_ptt, dump_buf
+ offset, dump, 0, last_written_line);
}
else if (last_written_line) {
-
/* Internal buffer wasn't wrapped: dump from buffer start until
* write pointer.
*/
@@ -3392,7 +3376,6 @@ static u32 ecore_grc_dump_mem_hdr(struct ecore_hwfn *p
offset += ecore_dump_section_hdr(dump_buf + offset, dump, "grc_mem",
num_params);
if (name) {
-
/* Dump name */
if (is_storm) {
OSAL_STRCPY(buf, "?STORM_");
@@ -3406,7 +3389,6 @@ static u32 ecore_grc_dump_mem_hdr(struct ecore_hwfn *p
offset += ecore_dump_str_param(dump_buf + offset, dump, "name",
buf);
}
else {
-
/* Dump address */
u32 addr_in_bytes = DWORDS_TO_BYTES(addr);
@@ -3712,7 +3694,6 @@ static u32 ecore_grc_dump_vfc_cam(struct ecore_hwfn *p
SET_VAR_FIELD(cam_addr, VFC_CAM_ADDR, OP, VFC_OPCODE_CAM_RD);
for (row = 0; row < VFC_CAM_NUM_ROWS; row++, offset +=
VFC_CAM_RESP_DWORDS) {
-
/* Write VFC CAM command */
SET_VAR_FIELD(cam_cmd, VFC_CAM_CMD, ROW, row);
ARR_REG_WR(p_hwfn, p_ptt, storm->sem_fast_mem_addr +
SEM_FAST_REG_VFC_DATA_WR, cam_cmd, VFC_CAM_CMD_DWORDS);
@@ -3750,7 +3731,6 @@ static u32 ecore_grc_dump_vfc_ram(struct ecore_hwfn *p
return offset + total_size;
for (row = ram_defs->base_row; row < ram_defs->base_row +
ram_defs->num_rows; row++, offset += VFC_RAM_RESP_DWORDS) {
-
/* Write VFC RAM command */
ARR_REG_WR(p_hwfn, p_ptt, storm->sem_fast_mem_addr +
SEM_FAST_REG_VFC_DATA_WR, ram_cmd, VFC_RAM_CMD_DWORDS);
@@ -4036,7 +4016,6 @@ static u32 ecore_grc_dump_static_debug(struct ecore_hw
/* Enable block's client */
ecore_bus_enable_clients(p_hwfn, p_ptt, 1 <<
block->dbg_client_id[dev_data->chip_id]);
for (line_id = 0; line_id < (u32)NUM_DBG_LINES(block_desc);
line_id++) {
-
/* Configure debug line ID */
ecore_config_dbg_line(p_hwfn, p_ptt, (enum
block_id)block_id, (u8)line_id, 0xf, 0, 0, 0);
@@ -4076,7 +4055,6 @@ static enum dbg_status ecore_grc_dump(struct ecore_hwf
*num_dumped_dwords = 0;
if (dump) {
-
/* Find port mode */
switch (ecore_rd(p_hwfn, p_ptt, MISC_REG_PORT_MODE)) {
case 0: port_mode = 1; break;
@@ -4177,7 +4155,6 @@ static enum dbg_status ecore_grc_dump(struct ecore_hwf
offset += ecore_dump_last_section(dump_buf, offset, dump);
if (dump) {
-
/* Unstall storms */
if (ecore_grc_get_param(p_hwfn, DBG_GRC_PARAM_UNSTALL))
ecore_grc_stall_storms(p_hwfn, p_ptt, false);
@@ -4745,7 +4722,6 @@ static enum dbg_status ecore_reg_fifo_dump(struct ecor
ecore_dump_num_param(dump_buf + size_param_offset, dump,
"size", dwords_read);
}
else {
-
/* FIFO max size is REG_FIFO_DEPTH_DWORDS. There is no way to
* test how much data is available, except for reading it.
*/
@@ -4799,7 +4775,6 @@ static enum dbg_status ecore_igu_fifo_dump(struct ecor
ecore_dump_num_param(dump_buf + size_param_offset, dump,
"size", dwords_read);
}
else {
-
/* FIFO max size is IGU_FIFO_DEPTH_DWORDS. There is no way to
* test how much data is available, except for reading it.
*/
@@ -5084,7 +5059,6 @@ enum dbg_status ecore_dbg_bus_set_nw_output(struct eco
ecore_wr(p_hwfn, p_ptt, DBG_REG_OTHER_ENGINE_MODE_BB_K2,
DBG_BUS_OTHER_ENGINE_MODE_CROSS_ENGINE_RX);
}
else {
-
/* Configure ethernet header of 14 bytes */
ecore_wr(p_hwfn, p_ptt, DBG_REG_ETHERNET_HDR_WIDTH, 0);
ecore_wr(p_hwfn, p_ptt, DBG_REG_ETHERNET_HDR_7, dest_addr_lo32);
@@ -5671,7 +5645,6 @@ static enum dbg_status ecore_config_storm_inputs(struc
/* Configure calendar */
for (i = 0; i < NUM_CALENDAR_SLOTS; i++, next_storm_id = (next_storm_id
+ 1) % MAX_DBG_STORMS) {
-
/* Find next enabled Storm */
for (; !dev_data->bus.storms[next_storm_id].enabled;
next_storm_id = (next_storm_id + 1) % MAX_DBG_STORMS);
@@ -5718,7 +5691,6 @@ static void ecore_assign_hw_ids(struct ecore_hwfn *p_h
}
if (hw_id_per_dword) {
-
/* Assign a different HW ID for each dword */
for (val_id = 0; val_id < VALUES_PER_CYCLE; val_id++)
hw_ids[val_id] = val_id;
@@ -6047,7 +6019,6 @@ enum dbg_status ecore_dbg_grc_config(struct ecore_hwfn
return DBG_STATUS_INVALID_ARGS;
if (s_grc_param_defs[grc_param].is_preset) {
-
/* Preset param */
/* Disabling a preset is not allowed. Call
@@ -6071,7 +6042,6 @@ enum dbg_status ecore_dbg_grc_config(struct ecore_hwfn
}
}
else {
-
/* Regular param - set its value */
ecore_grc_set_param(p_hwfn, grc_param, val);
}
@@ -6506,4 +6476,3 @@ bool ecore_is_block_in_reset(struct ecore_hwfn *p_hwfn
return s_reset_regs_defs[reset_reg].exists[dev_data->chip_id] ?
!(ecore_rd(p_hwfn, p_ptt, s_reset_regs_defs[reset_reg].addr) &
(1 << block->reset_bit_offset)) : true;
}
-
Modified: head/sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
==============================================================================
--- head/sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h Tue Sep 1 21:57:15
2020 (r365168)
+++ head/sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h Tue Sep 1 21:57:33
2020 (r365169)
@@ -893,5 +893,4 @@ bool ecore_is_block_in_reset(struct ecore_hwfn *p_hwfn
struct ecore_ptt
*p_ptt,
enum block_id block);
-
#endif
Modified: head/sys/dev/qlnx/qlnxe/ecore_dbg_values.h
==============================================================================
--- head/sys/dev/qlnx/qlnxe/ecore_dbg_values.h Tue Sep 1 21:57:15 2020
(r365168)
+++ head/sys/dev/qlnx/qlnxe/ecore_dbg_values.h Tue Sep 1 21:57:33 2020
(r365169)
@@ -28,7 +28,6 @@
*
*/
-
#ifndef __DBG_VALUES_H__
#define __DBG_VALUES_H__
Modified: head/sys/dev/qlnx/qlnxe/ecore_dev.c
==============================================================================
--- head/sys/dev/qlnx/qlnxe/ecore_dev.c Tue Sep 1 21:57:15 2020
(r365168)
+++ head/sys/dev/qlnx/qlnxe/ecore_dev.c Tue Sep 1 21:57:33 2020
(r365169)
@@ -232,7 +232,6 @@ enum _ecore_status_t ecore_db_recovery_del(struct ecor
&p_hwfn->db_recovery_info.list,
list_entry,
struct ecore_db_recovery_entry) {
-
/* search according to db_data addr since db_addr is not unique
(roce) */
if (db_entry->db_data == db_data) {
ecore_db_recovery_dp_entry(p_hwfn, db_entry,
"Deleting");
@@ -1837,7 +1836,6 @@ static u32 ecore_get_pq_flags(struct ecore_hwfn *p_hwf
return flags;
}
-
/* Getters for resource amounts necessary for qm initialization */
u8 ecore_init_qm_get_num_tcs(struct ecore_hwfn *p_hwfn)
Modified: head/sys/dev/qlnx/qlnxe/ecore_fcoe.h
==============================================================================
--- head/sys/dev/qlnx/qlnxe/ecore_fcoe.h Tue Sep 1 21:57:15 2020
(r365168)
+++ head/sys/dev/qlnx/qlnxe/ecore_fcoe.h Tue Sep 1 21:57:33 2020
(r365169)
@@ -53,9 +53,7 @@ static inline enum _ecore_status_t ecore_fcoe_alloc(st
{
return ECORE_INVAL;
}
-
static inline void ecore_fcoe_setup(struct ecore_hwfn OSAL_UNUSED *p_hwfn) {}
-
static inline void ecore_fcoe_free(struct ecore_hwfn OSAL_UNUSED *p_hwfn) {}
#endif
@@ -74,4 +72,3 @@ ecore_sp_fcoe_conn_destroy(struct ecore_hwfn *p_hwfn,
#endif
#endif /*__ECORE_FCOE_H__*/
-
Modified: head/sys/dev/qlnx/qlnxe/ecore_hsi_common.h
==============================================================================
--- head/sys/dev/qlnx/qlnxe/ecore_hsi_common.h Tue Sep 1 21:57:15 2020
(r365168)
+++ head/sys/dev/qlnx/qlnxe/ecore_hsi_common.h Tue Sep 1 21:57:33 2020
(r365169)
@@ -35,7 +35,6 @@
/********************************/
#include "common_hsi.h"
-
/*
* opcodes for the event ring
*/
@@ -54,7 +53,6 @@ enum common_event_opcode
MAX_COMMON_EVENT_OPCODE
};
-
/*
* Common Ramrod Command IDs
*/
@@ -71,7 +69,6 @@ enum common_ramrod_cmd_id
MAX_COMMON_RAMROD_CMD_ID
};
-
/*
* How ll2 should deal with packet upon errors
*/
@@ -83,7 +80,6 @@ enum core_error_handle
MAX_CORE_ERROR_HANDLE
};
-
/*
* opcodes for the event ring
*/
@@ -98,7 +94,6 @@ enum core_event_opcode
MAX_CORE_EVENT_OPCODE
};
-
/*
* The L4 pseudo checksum mode for Core
*/
@@ -109,7 +104,6 @@ enum core_l4_pseudo_checksum_mode
MAX_CORE_L4_PSEUDO_CHECKSUM_MODE
};
-
/*
* Light-L2 RX Producers in Tstorm RAM
*/
@@ -121,7 +115,6 @@ struct core_ll2_port_stats
struct regpair gsi_crcchksm_error;
};
-
/*
* Ethernet TX Per Queue Stats
*/
@@ -135,7 +128,6 @@ struct core_ll2_pstorm_per_queue_stat
struct regpair sent_bcast_pkts /* number of total packets sent without
errors */;
};
-
/*
* Light-L2 RX Producers in Tstorm RAM
*/
@@ -146,14 +138,12 @@ struct core_ll2_rx_prod
__le32 reserved;
};
-
struct core_ll2_tstorm_per_queue_stat
{
struct regpair packet_too_big_discard /* Number of packets discarded
because they are bigger than MTU */;
struct regpair no_buff_discard /* Number of packets discarded due to
lack of host buffers */;
};
-
struct core_ll2_ustorm_per_queue_stat
{
struct regpair rcv_ucast_bytes;
@@ -164,7 +154,6 @@ struct core_ll2_ustorm_per_queue_stat
struct regpair rcv_bcast_pkts;
};
-
/*
* Core Ramrod Command IDs (light L2)
*/
@@ -180,7 +169,6 @@ enum core_ramrod_cmd_id
MAX_CORE_RAMROD_CMD_ID
};
-
/*
* Core RX CQE Type for Light L2
*/
@@ -191,7 +179,6 @@ enum core_roce_flavor_type
MAX_CORE_ROCE_FLAVOR_TYPE
};
-
/*
* Specifies how ll2 should deal with packets errors: packet_too_big and
no_buff
*/
@@ -206,7 +193,6 @@ struct core_rx_action_on_error
#define CORE_RX_ACTION_ON_ERROR_RESERVED_SHIFT 4
};
-
/*
* Core RX BD for Light L2
*/
@@ -216,7 +202,6 @@ struct core_rx_bd
__le16 reserved[4];
};
-
/*
* Core RX CM offload BD for Light L2
*/
@@ -236,8 +221,6 @@ union core_rx_bd_union
struct core_rx_bd_with_buff_len rx_bd_with_len /* Core Rx Bd with
dynamic buffer length */;
};
-
-
/*
* Opaque Data for Light L2 RX CQE .
*/
@@ -246,7 +229,6 @@ struct core_rx_cqe_opaque_data
__le32 data[2] /* Opaque CQE Data */;
};
-
/*
* Core RX CQE Type for Light L2
*/
@@ -259,7 +241,6 @@ enum core_rx_cqe_type
MAX_CORE_RX_CQE_TYPE
};
-
/*
* Core RX CQE for Light L2 .
*/
@@ -315,10 +296,6 @@ union core_rx_cqe_union
struct core_rx_slow_path_cqe rx_cqe_sp /* Slow path CQE */;
};
-
-
-
-
/*
* Ramrod data for rx queue start ramrod
*/
@@ -344,7 +321,6 @@ struct core_rx_start_ramrod_data
u8 reserved[6];
};
-
/*
* Ramrod data for rx queue stop ramrod
*/
@@ -357,7 +333,6 @@ struct core_rx_stop_ramrod_data
__le16 reserved2[2];
};
-
/*
* Flags for Core TX BD
*/
@@ -408,8 +383,6 @@ struct core_tx_bd
#define CORE_TX_BD_TX_DST_SHIFT 14
};
-
-
/*
* Light L2 TX Destination
*/
@@ -422,7 +395,6 @@ enum core_tx_dest
MAX_CORE_TX_DEST
};
-
/*
* Ramrod data for tx queue start ramrod
*/
@@ -441,7 +413,6 @@ struct core_tx_start_ramrod_data
u8 resrved[3];
};
-
/*
* Ramrod data for tx queue stop ramrod
*/
@@ -450,7 +421,6 @@ struct core_tx_stop_ramrod_data
__le32 reserved0[2];
};
-
/*
* Ramrod data for tx queue update ramrod
*/
@@ -462,7 +432,6 @@ struct core_tx_update_ramrod_data
__le32 reserved1[1];
};
-
/*
* Enum flag for what type of DCB data to update
*/
@@ -475,7 +444,6 @@ enum dcb_dscp_update_mode
MAX_DCB_DSCP_UPDATE_MODE
};
-
/*
* The core storm context for the Ystorm
*/
@@ -978,7 +946,6 @@ struct e4_core_conn_context
struct regpair ustorm_st_padding[2] /* padding */;
};
-
struct e5_xstorm_core_conn_ag_ctx
{
u8 reserved0 /* cdu_validation */;
@@ -1479,7 +1446,6 @@ struct e5_core_conn_context
struct regpair ustorm_st_padding[2] /* padding */;
};
-
struct eth_mstorm_per_pf_stat
{
struct regpair gre_discard_pkts /* Dropped GRE RX packets */;
@@ -1488,7 +1454,6 @@ struct eth_mstorm_per_pf_stat
struct regpair lb_discard_pkts /* Dropped Tx switched packets */;
};
-
struct eth_mstorm_per_queue_stat
{
struct regpair ttl0_discard /* Number of packets discarded because
TTL=0 (in IPv4) or hopLimit=0 (in IPv6) */;
@@ -1501,7 +1466,6 @@ struct eth_mstorm_per_queue_stat
struct regpair tpa_coalesced_bytes /* total TCP payload length in all
TPA aggregations */;
};
-
/*
* Ethernet TX Per PF
*/
@@ -1524,7 +1488,6 @@ struct eth_pstorm_per_pf_stat
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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