Author: kib
Date: Mon Aug 31 16:25:55 2020
New Revision: 365000
URL: https://svnweb.freebsd.org/changeset/base/365000
Log:
mlx5_core: add mlx5_query_pddr().
And use it in mlx5_query_pddr_range_info() instead of direct register
access.
Sponsored by: Mellanox Technologies - Nvidia
MFC after: 1 week
Modified:
head/sys/dev/mlx5/mlx5_core/mlx5_port.c
head/sys/dev/mlx5/mlx5_ifc.h
Modified: head/sys/dev/mlx5/mlx5_core/mlx5_port.c
==============================================================================
--- head/sys/dev/mlx5/mlx5_core/mlx5_port.c Mon Aug 31 16:23:51 2020
(r364999)
+++ head/sys/dev/mlx5/mlx5_core/mlx5_port.c Mon Aug 31 16:25:55 2020
(r365000)
@@ -1175,19 +1175,29 @@ out:
return err;
}
+static int mlx5_query_pddr(struct mlx5_core_dev *mdev,
+ u8 local_port, int page_select, u32 *out, int outlen)
+{
+ u32 in[MLX5_ST_SZ_DW(pddr_reg)] = {0};
+
+ if (!MLX5_CAP_PCAM_REG(mdev, pddr))
+ return -EOPNOTSUPP;
+
+ MLX5_SET(pddr_reg, in, local_port, local_port);
+ MLX5_SET(pddr_reg, in, page_select, page_select);
+
+ return mlx5_core_access_reg(mdev, in, sizeof(in), out, outlen,
MLX5_REG_PDDR, 0, 0);
+}
+
int mlx5_query_pddr_range_info(struct mlx5_core_dev *mdev, u8 local_port, u8
*is_er_type)
{
u32 pddr_reg[MLX5_ST_SZ_DW(pddr_reg)] = {};
- int sz = MLX5_ST_SZ_BYTES(pddr_reg);
int error;
u8 ecc;
u8 ci;
- MLX5_SET(pddr_reg, pddr_reg, local_port, local_port);
- MLX5_SET(pddr_reg, pddr_reg, page_select, 3 /* module info page */);
-
- error = mlx5_core_access_reg(mdev, pddr_reg, sz, pddr_reg, sz,
- MLX5_ACCESS_REG_SUMMARY_CTRL_ID_PDDR, 0, 0);
+ error = mlx5_query_pddr(mdev, local_port, MLX5_PDDR_MODULE_INFO_PAGE,
+ pddr_reg, sizeof(pddr_reg));
if (error != 0)
return (error);
Modified: head/sys/dev/mlx5/mlx5_ifc.h
==============================================================================
--- head/sys/dev/mlx5/mlx5_ifc.h Mon Aug 31 16:23:51 2020
(r364999)
+++ head/sys/dev/mlx5/mlx5_ifc.h Mon Aug 31 16:25:55 2020
(r365000)
@@ -780,10 +780,6 @@ struct mlx5_ifc_flow_table_nic_cap_bits {
u8 reserved_1[0x7200];
};
-enum {
- MLX5_ACCESS_REG_SUMMARY_CTRL_ID_PDDR = 0x5031,
-};
-
struct mlx5_ifc_pddr_module_info_bits {
u8 cable_technology[0x8];
u8 cable_breakout[0x8];
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