Author: br Date: Tue Jul 28 16:08:14 2020 New Revision: 363650 URL: https://svnweb.freebsd.org/changeset/base/363650
Log: o Move the buswide_ctxs bitmap to iommu_unit and rename related functions. o Rename bus_dma_dmar_load_ident() as well. Reviewed by: kib Sponsored by: DARPA/AFRL Differential Revision: https://reviews.freebsd.org/D25852 Modified: head/sys/dev/iommu/busdma_iommu.c head/sys/dev/iommu/iommu.h head/sys/dev/ntb/ntb_hw/ntb_hw_intel.c head/sys/dev/ntb/ntb_hw/ntb_hw_plx.c head/sys/x86/include/bus_dma.h head/sys/x86/iommu/intel_ctx.c head/sys/x86/iommu/intel_dmar.h head/sys/x86/iommu/intel_drv.c head/sys/x86/x86/busdma_machdep.c Modified: head/sys/dev/iommu/busdma_iommu.c ============================================================================== --- head/sys/dev/iommu/busdma_iommu.c Tue Jul 28 15:26:19 2020 (r363649) +++ head/sys/dev/iommu/busdma_iommu.c Tue Jul 28 16:08:14 2020 (r363650) @@ -299,7 +299,7 @@ acpi_iommu_get_dma_tag(device_t dev, device_t child) } bool -bus_dma_dmar_set_buswide(device_t dev) +bus_dma_iommu_set_buswide(device_t dev) { struct iommu_unit *unit; device_t parent; @@ -317,12 +317,12 @@ bus_dma_dmar_set_buswide(device_t dev) if (slot != 0 || func != 0) { if (bootverbose) { device_printf(dev, - "dmar%d pci%d:%d:%d requested buswide busdma\n", + "iommu%d pci%d:%d:%d requested buswide busdma\n", unit->unit, busno, slot, func); } return (false); } - dmar_set_buswide_ctx(unit, busno); + iommu_set_buswide_ctx(unit, busno); return (true); } @@ -987,7 +987,7 @@ iommu_fini_busdma(struct iommu_unit *unit) } int -bus_dma_dmar_load_ident(bus_dma_tag_t dmat, bus_dmamap_t map1, +bus_dma_iommu_load_ident(bus_dma_tag_t dmat, bus_dmamap_t map1, vm_paddr_t start, vm_size_t length, int flags) { struct bus_dma_tag_common *tc; Modified: head/sys/dev/iommu/iommu.h ============================================================================== --- head/sys/dev/iommu/iommu.h Tue Jul 28 15:26:19 2020 (r363649) +++ head/sys/dev/iommu/iommu.h Tue Jul 28 16:08:14 2020 (r363650) @@ -34,12 +34,14 @@ #ifndef _SYS_IOMMU_H_ #define _SYS_IOMMU_H_ +#include <sys/types.h> #include <sys/queue.h> #include <sys/sysctl.h> #include <sys/taskqueue.h> #include <sys/tree.h> -#include <sys/types.h> +#include <dev/pci/pcireg.h> + /* Host or physical memory address, after translation. */ typedef uint64_t iommu_haddr_t; /* Guest or bus address, before translation. */ @@ -96,6 +98,14 @@ struct iommu_unit { struct task dmamap_load_task; TAILQ_HEAD(, bus_dmamap_iommu) delayed_maps; struct taskqueue *delayed_taskqueue; + + /* + * Bitmap of buses for which context must ignore slot:func, + * duplicating the page table pointer into all context table + * entries. This is a client-controlled quirk to support some + * NTBs. + */ + uint32_t buswide_ctxs[(PCI_BUSMAX + 1) / NBBY / sizeof(uint32_t)]; }; /* Modified: head/sys/dev/ntb/ntb_hw/ntb_hw_intel.c ============================================================================== --- head/sys/dev/ntb/ntb_hw/ntb_hw_intel.c Tue Jul 28 15:26:19 2020 (r363649) +++ head/sys/dev/ntb/ntb_hw/ntb_hw_intel.c Tue Jul 28 16:08:14 2020 (r363650) @@ -811,7 +811,7 @@ intel_ntb_map_pci_bars(struct ntb_softc *ntb) device_printf(ntb->device, "Unable to create BAR0 map\n"); return (ENOMEM); } - if (bus_dma_dmar_load_ident(ntb->bar0_dma_tag, ntb->bar0_dma_map, + if (bus_dma_iommu_load_ident(ntb->bar0_dma_tag, ntb->bar0_dma_map, bar->pbase, bar->size, 0)) { device_printf(ntb->device, "Unable to load BAR0 map\n"); return (ENOMEM); Modified: head/sys/dev/ntb/ntb_hw/ntb_hw_plx.c ============================================================================== --- head/sys/dev/ntb/ntb_hw/ntb_hw_plx.c Tue Jul 28 15:26:19 2020 (r363649) +++ head/sys/dev/ntb/ntb_hw/ntb_hw_plx.c Tue Jul 28 16:08:14 2020 (r363650) @@ -343,7 +343,7 @@ ntb_plx_attach(device_t dev) * The device occupies whole bus. In translated TLP slot field * keeps LUT index (original bus/slot), function is passed through. */ - bus_dma_dmar_set_buswide(dev); + bus_dma_iommu_set_buswide(dev); /* Identify chip port we are connected to. */ val = bus_read_4(sc->conf_res, 0x360); Modified: head/sys/x86/include/bus_dma.h ============================================================================== --- head/sys/x86/include/bus_dma.h Tue Jul 28 15:26:19 2020 (r363649) +++ head/sys/x86/include/bus_dma.h Tue Jul 28 16:08:14 2020 (r363650) @@ -192,8 +192,8 @@ _bus_dmamap_complete(bus_dma_tag_t dmat, bus_dmamap_t } #ifdef _KERNEL -bool bus_dma_dmar_set_buswide(device_t dev); -int bus_dma_dmar_load_ident(bus_dma_tag_t dmat, bus_dmamap_t map, +bool bus_dma_iommu_set_buswide(device_t dev); +int bus_dma_iommu_load_ident(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t start, vm_size_t length, int flags); #endif Modified: head/sys/x86/iommu/intel_ctx.c ============================================================================== --- head/sys/x86/iommu/intel_ctx.c Tue Jul 28 15:26:19 2020 (r363649) +++ head/sys/x86/iommu/intel_ctx.c Tue Jul 28 16:08:14 2020 (r363650) @@ -196,7 +196,7 @@ ctx_id_entry_init(struct dmar_ctx *ctx, dmar_ctx_entry IOMMU_PGF_NOALLOC); } - if (dmar_is_buswide_ctx(unit, busno)) { + if (iommu_is_buswide_ctx((struct iommu_unit *)unit, busno)) { MPASS(!move); for (i = 0; i <= PCI_BUSMAX; i++) { ctx_id_entry_init_one(&ctxp[i], domain, ctx_root); @@ -464,6 +464,7 @@ dmar_get_ctx_for_dev1(struct dmar_unit *dmar, device_t { struct dmar_domain *domain, *domain1; struct dmar_ctx *ctx, *ctx1; + struct iommu_unit *unit; dmar_ctx_entry_t *ctxp; struct sf_buf *sf; int bus, slot, func, error; @@ -480,9 +481,10 @@ dmar_get_ctx_for_dev1(struct dmar_unit *dmar, device_t } enable = false; TD_PREP_PINNED_ASSERT; + unit = (struct iommu_unit *)dmar; DMAR_LOCK(dmar); - KASSERT(!dmar_is_buswide_ctx(dmar, bus) || (slot == 0 && func == 0), - ("dmar%d pci%d:%d:%d get_ctx for buswide", dmar->iommu.unit, bus, + KASSERT(!iommu_is_buswide_ctx(unit, bus) || (slot == 0 && func == 0), + ("iommu%d pci%d:%d:%d get_ctx for buswide", dmar->iommu.unit, bus, slot, func)); ctx = dmar_find_ctx_locked(dmar, rid); error = 0; Modified: head/sys/x86/iommu/intel_dmar.h ============================================================================== --- head/sys/x86/iommu/intel_dmar.h Tue Jul 28 15:26:19 2020 (r363649) +++ head/sys/x86/iommu/intel_dmar.h Tue Jul 28 16:08:14 2020 (r363650) @@ -167,15 +167,6 @@ struct dmar_unit { struct iommu_map_entries_tailq tlb_flush_entries; struct task qi_task; struct taskqueue *qi_taskqueue; - - /* - * Bitmap of buses for which context must ignore slot:func, - * duplicating the page table pointer into all context table - * entries. This is a client-controlled quirk to support some - * NTBs. - */ - uint32_t buswide_ctxs[(PCI_BUSMAX + 1) / NBBY / sizeof(uint32_t)]; - }; #define DMAR_LOCK(dmar) mtx_lock(&(dmar)->iommu.lock) @@ -290,8 +281,8 @@ void dmar_quirks_pre_use(struct iommu_unit *dmar); int dmar_init_irt(struct dmar_unit *unit); void dmar_fini_irt(struct dmar_unit *unit); -void dmar_set_buswide_ctx(struct iommu_unit *unit, u_int busno); -bool dmar_is_buswide_ctx(struct dmar_unit *unit, u_int busno); +void iommu_set_buswide_ctx(struct iommu_unit *unit, u_int busno); +bool iommu_is_buswide_ctx(struct iommu_unit *unit, u_int busno); extern iommu_haddr_t dmar_high; extern int haw; Modified: head/sys/x86/iommu/intel_drv.c ============================================================================== --- head/sys/x86/iommu/intel_drv.c Tue Jul 28 15:26:19 2020 (r363649) +++ head/sys/x86/iommu/intel_drv.c Tue Jul 28 16:08:14 2020 (r363650) @@ -593,21 +593,18 @@ DRIVER_MODULE(dmar, acpi, dmar_driver, dmar_devclass, MODULE_DEPEND(dmar, acpi, 1, 1, 1); void -dmar_set_buswide_ctx(struct iommu_unit *unit, u_int busno) +iommu_set_buswide_ctx(struct iommu_unit *unit, u_int busno) { - struct dmar_unit *dmar; - dmar = (struct dmar_unit *)unit; - MPASS(busno <= PCI_BUSMAX); - DMAR_LOCK(dmar); - dmar->buswide_ctxs[busno / NBBY / sizeof(uint32_t)] |= + IOMMU_LOCK(unit); + unit->buswide_ctxs[busno / NBBY / sizeof(uint32_t)] |= 1 << (busno % (NBBY * sizeof(uint32_t))); - DMAR_UNLOCK(dmar); + IOMMU_UNLOCK(unit); } bool -dmar_is_buswide_ctx(struct dmar_unit *unit, u_int busno) +iommu_is_buswide_ctx(struct iommu_unit *unit, u_int busno) { MPASS(busno <= PCI_BUSMAX); Modified: head/sys/x86/x86/busdma_machdep.c ============================================================================== --- head/sys/x86/x86/busdma_machdep.c Tue Jul 28 15:26:19 2020 (r363649) +++ head/sys/x86/x86/busdma_machdep.c Tue Jul 28 16:08:14 2020 (r363650) @@ -301,13 +301,13 @@ bus_dma_tag_destroy(bus_dma_tag_t dmat) #ifndef ACPI_DMAR bool -bus_dma_dmar_set_buswide(device_t dev) +bus_dma_iommu_set_buswide(device_t dev) { return (false); } int -bus_dma_dmar_load_ident(bus_dma_tag_t dmat, bus_dmamap_t map, +bus_dma_iommu_load_ident(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t start, vm_size_t length, int flags) { return (0); _______________________________________________ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
