Author: jmallett
Date: Sat Oct 2 05:43:17 2010
New Revision: 213346
URL: http://svn.freebsd.org/changeset/base/213346
Log:
o) Allow devices to override the MDIO read and write functions presented to
the miibus attached to octe interfaces.
o) Add an SMI/MDIO interface to the MV88E61XX and use it for the switch PHY on
the Lanner MR-320. An actual driver for the switch PHY will come later.
Note that for now it intercepts and fakes MII_BMSR reads to prevent the
miibus from talking to anything but the switch itself.
Added:
head/sys/mips/cavium/octe/ethernet-mv88e61xx.c (contents, props changed)
head/sys/mips/cavium/octe/ethernet-mv88e61xx.h (contents, props changed)
Modified:
head/sys/contrib/octeon-sdk/cvmx-helper-board.c
head/sys/mips/cavium/files.octeon1
head/sys/mips/cavium/octe/cavium-ethernet.h
head/sys/mips/cavium/octe/ethernet-common.c
head/sys/mips/cavium/octe/ethernet-headers.h
head/sys/mips/cavium/octe/ethernet-mdio.c
head/sys/mips/cavium/octe/octe.c
Modified: head/sys/contrib/octeon-sdk/cvmx-helper-board.c
==============================================================================
--- head/sys/contrib/octeon-sdk/cvmx-helper-board.c Sat Oct 2 05:38:45
2010 (r213345)
+++ head/sys/contrib/octeon-sdk/cvmx-helper-board.c Sat Oct 2 05:43:17
2010 (r213346)
@@ -181,10 +181,11 @@ int cvmx_helper_board_get_mii_address(in
/* Private vendor-defined boards. */
#if defined(OCTEON_VENDOR_LANNER)
case CVMX_BOARD_TYPE_CUST_LANNER_MR320:
+ /* Port 0 is a Marvell 88E6161 switch, ports 1 and 2 are Marvell
+ 88E1111 interfaces. */
switch (ipd_port) {
case 0:
- /* XXX Switch PHY? */
- return -1;
+ return 16;
case 1:
return 1;
case 2:
Modified: head/sys/mips/cavium/files.octeon1
==============================================================================
--- head/sys/mips/cavium/files.octeon1 Sat Oct 2 05:38:45 2010
(r213345)
+++ head/sys/mips/cavium/files.octeon1 Sat Oct 2 05:43:17 2010
(r213346)
@@ -21,6 +21,7 @@ mips/cavium/cryptocteon/cavium_crypto.c
mips/cavium/cryptocteon/cryptocteon.c optional cryptocteon
mips/cavium/octe/ethernet.c optional octe
+mips/cavium/octe/ethernet-mv88e61xx.c optional octe
octeon_vendor_lanner
mips/cavium/octe/ethernet-common.c optional octe
mips/cavium/octe/ethernet-mdio.c optional octe
mips/cavium/octe/ethernet-mem.c optional octe
Modified: head/sys/mips/cavium/octe/cavium-ethernet.h
==============================================================================
--- head/sys/mips/cavium/octe/cavium-ethernet.h Sat Oct 2 05:38:45 2010
(r213345)
+++ head/sys/mips/cavium/octe/cavium-ethernet.h Sat Oct 2 05:43:17 2010
(r213346)
@@ -72,6 +72,8 @@ typedef struct {
uint8_t mac[6];
int phy_id;
+ int (*mdio_read)(struct ifnet *, int, int);
+ void (*mdio_write)(struct ifnet *, int, int, int);
struct ifqueue tx_free_queue[16];
Modified: head/sys/mips/cavium/octe/ethernet-common.c
==============================================================================
--- head/sys/mips/cavium/octe/ethernet-common.c Sat Oct 2 05:38:45 2010
(r213345)
+++ head/sys/mips/cavium/octe/ethernet-common.c Sat Oct 2 05:43:17 2010
(r213346)
@@ -266,6 +266,20 @@ int cvm_oct_common_init(struct ifnet *if
memset(ifp->get_stats(ifp), 0, sizeof(struct ifnet_stats));
#endif
+ /*
+ * Do any last-minute board-specific initialization.
+ */
+ switch (cvmx_sysinfo_get()->board_type) {
+#if defined(OCTEON_VENDOR_LANNER)
+ case CVMX_BOARD_TYPE_CUST_LANNER_MR320:
+ if (priv->phy_id == 16)
+ cvm_oct_mv88e61xx_setup_device(ifp);
+ break;
+#endif
+ default:
+ break;
+ }
+
device_attach(priv->dev);
return 0;
Modified: head/sys/mips/cavium/octe/ethernet-headers.h
==============================================================================
--- head/sys/mips/cavium/octe/ethernet-headers.h Sat Oct 2 05:38:45
2010 (r213345)
+++ head/sys/mips/cavium/octe/ethernet-headers.h Sat Oct 2 05:43:17
2010 (r213346)
@@ -40,4 +40,11 @@ AND WITH ALL FAULTS AND CAVIUM NETWORKS
#include "ethernet-tx.h"
#include "ethernet-util.h"
+/*
+ * Any board- or vendor-specific includes.
+ */
+#ifdef OCTEON_VENDOR_LANNER
+#include "ethernet-mv88e61xx.h"
+#endif
+
#endif
Modified: head/sys/mips/cavium/octe/ethernet-mdio.c
==============================================================================
--- head/sys/mips/cavium/octe/ethernet-mdio.c Sat Oct 2 05:38:45 2010
(r213345)
+++ head/sys/mips/cavium/octe/ethernet-mdio.c Sat Oct 2 05:43:17 2010
(r213346)
@@ -132,6 +132,8 @@ int cvm_oct_mdio_setup_device(struct ifn
cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
priv->phy_id = cvmx_helper_board_get_mii_address(priv->port);
+ priv->mdio_read = NULL;
+ priv->mdio_write = NULL;
return 0;
}
Added: head/sys/mips/cavium/octe/ethernet-mv88e61xx.c
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/mips/cavium/octe/ethernet-mv88e61xx.c Sat Oct 2 05:43:17
2010 (r213346)
@@ -0,0 +1,151 @@
+/*-
+ * Copyright (c) 2010 Juli Mallett <jmall...@freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/*
+ * Interface to the Marvell 88E61XX SMI/MDIO.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/endian.h>
+#include <sys/kernel.h>
+#include <sys/mbuf.h>
+#include <sys/socket.h>
+
+#include <dev/mii/mii.h>
+
+#include <net/ethernet.h>
+#include <net/if.h>
+
+#include "wrapper-cvmx-includes.h"
+#include "ethernet-headers.h"
+
+#define MV88E61XX_SMI_PHY_SW 0x10 /* Switch PHY. */
+
+#define MV88E61XX_SMI_REG_CMD 0x00 /* Indirect command register.
*/
+#define MV88E61XX_SMI_CMD_BUSY 0x8000 /* Busy bit. */
+#define MV88E61XX_SMI_CMD_22 0x1000 /* Clause 22 (default
45.) */
+#define MV88E61XX_SMI_CMD_READ 0x0800 /* Read command. */
+#define MV88E61XX_SMI_CMD_WRITE 0x0400 /* Write command. */
+#define MV88E61XX_SMI_CMD_PHY(phy) (((phy) & 0x1f) << 5)
+#define MV88E61XX_SMI_CMD_REG(reg) ((reg) & 0x1f)
+
+#define MV88E61XX_SMI_REG_DAT 0x01 /* Indirect data register. */
+
+static int cvm_oct_mv88e61xx_mdio_read(struct ifnet *, int, int);
+static void cvm_oct_mv88e61xx_mdio_write(struct ifnet *, int, int, int);
+static int cvm_oct_mv88e61xx_smi_read(struct ifnet *, int, int);
+static void cvm_oct_mv88e61xx_smi_write(struct ifnet *, int, int, int);
+static int cvm_oct_mv88e61xx_smi_wait(struct ifnet *, int);
+
+int
+cvm_oct_mv88e61xx_setup_device(struct ifnet *ifp)
+{
+ cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
+
+ priv->mdio_read = cvm_oct_mv88e61xx_mdio_read;
+ priv->mdio_write = cvm_oct_mv88e61xx_mdio_write;
+
+ return (0);
+}
+
+static int
+cvm_oct_mv88e61xx_mdio_read(struct ifnet *ifp, int phy_id, int location)
+{
+ /*
+ * Intercept reads of MII_BMSR. The miibus uses this to determine
+ * PHY presence and we only want it to look for a PHY attachment
+ * for the switch PHY itself. The PHY driver will talk to all of
+ * the other ports as need be.
+ */
+ switch (location) {
+ case MII_BMSR:
+ if (phy_id != MV88E61XX_SMI_PHY_SW)
+ return (0);
+ return (BMSR_EXTSTAT | BMSR_ACOMP | BMSR_LINK);
+ default:
+ return (cvm_oct_mv88e61xx_smi_read(ifp, phy_id, location));
+ }
+}
+
+static void
+cvm_oct_mv88e61xx_mdio_write(struct ifnet *ifp, int phy_id, int location, int
val)
+{
+ return (cvm_oct_mv88e61xx_smi_write(ifp, phy_id, location, val));
+}
+
+static int
+cvm_oct_mv88e61xx_smi_read(struct ifnet *ifp, int phy_id, int location)
+{
+ int error;
+
+ error = cvm_oct_mv88e61xx_smi_wait(ifp, phy_id);
+ if (error != 0)
+ return (0);
+
+ cvm_oct_mdio_write(ifp, phy_id, MV88E61XX_SMI_REG_CMD,
+ MV88E61XX_SMI_CMD_BUSY | MV88E61XX_SMI_CMD_22 |
+ MV88E61XX_SMI_CMD_READ | MV88E61XX_SMI_CMD_PHY(phy_id) |
+ MV88E61XX_SMI_CMD_REG(location));
+
+ error = cvm_oct_mv88e61xx_smi_wait(ifp, phy_id);
+ if (error != 0)
+ return (0);
+
+ return (cvm_oct_mdio_read(ifp, phy_id, MV88E61XX_SMI_REG_DAT));
+}
+
+static void
+cvm_oct_mv88e61xx_smi_write(struct ifnet *ifp, int phy_id, int location, int
val)
+{
+ cvm_oct_mv88e61xx_smi_wait(ifp, phy_id);
+ cvm_oct_mdio_write(ifp, phy_id, MV88E61XX_SMI_REG_DAT, val);
+ cvm_oct_mdio_write(ifp, phy_id, MV88E61XX_SMI_REG_CMD,
+ MV88E61XX_SMI_CMD_BUSY | MV88E61XX_SMI_CMD_22 |
+ MV88E61XX_SMI_CMD_WRITE | MV88E61XX_SMI_CMD_PHY(phy_id) |
+ MV88E61XX_SMI_CMD_REG(location));
+ cvm_oct_mv88e61xx_smi_wait(ifp, phy_id);
+}
+
+static int
+cvm_oct_mv88e61xx_smi_wait(struct ifnet *ifp, int phy_id)
+{
+ uint16_t cmd;
+ unsigned i;
+
+ for (i = 0; i < 10000; i++) {
+ cmd = cvm_oct_mdio_read(ifp, phy_id, MV88E61XX_SMI_REG_CMD);
+ if ((cmd & MV88E61XX_SMI_CMD_BUSY) == 0)
+ return (0);
+ }
+ return (ETIMEDOUT);
+}
Added: head/sys/mips/cavium/octe/ethernet-mv88e61xx.h
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/mips/cavium/octe/ethernet-mv88e61xx.h Sat Oct 2 05:43:17
2010 (r213346)
@@ -0,0 +1,34 @@
+/*-
+ * Copyright (c) 2010 Juli Mallett <jmall...@freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef _CAVIUM_OCTE_ETHERNET_MV88E61XX_H_
+#define _CAVIUM_OCTE_ETHERNET_MV88E61XX_H_
+
+int cvm_oct_mv88e61xx_setup_device(struct ifnet *ifp);
+
+#endif /* !_CAVIUM_OCTE_ETHERNET_MV88E61XX_H_ */
Modified: head/sys/mips/cavium/octe/octe.c
==============================================================================
--- head/sys/mips/cavium/octe/octe.c Sat Oct 2 05:38:45 2010
(r213345)
+++ head/sys/mips/cavium/octe/octe.c Sat Oct 2 05:43:17 2010
(r213346)
@@ -224,6 +224,15 @@ octe_miibus_readreg(device_t dev, int ph
priv = device_get_softc(dev);
+ /*
+ * Try interface-specific MII routine.
+ */
+ if (priv->mdio_read != NULL)
+ return (priv->mdio_read(priv->ifp, phy, reg));
+
+ /*
+ * Try generic MII routine.
+ */
if (phy != priv->phy_id)
return (0);
@@ -237,9 +246,19 @@ octe_miibus_writereg(device_t dev, int p
priv = device_get_softc(dev);
+ /*
+ * Try interface-specific MII routine.
+ */
+ if (priv->mdio_write != NULL) {
+ priv->mdio_write(priv->ifp, phy, reg, val);
+ return (0);
+ }
+
+ /*
+ * Try generic MII routine.
+ */
KASSERT(phy == priv->phy_id,
("write to phy %u but our phy is %u", phy, priv->phy_id));
-
cvm_oct_mdio_write(priv->ifp, phy, reg, val);
return (0);
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