Author: rpaulo
Date: Mon Feb 15 17:49:49 2010
New Revision: 203930
URL: http://svn.freebsd.org/changeset/base/203930
Log:
Bring back AR9285 support. This fixes most of the issues and should be
pretty usable.
MFC after: 1 month
Added:
head/sys/dev/ath/ath_hal/ar5416/ar9285.c (contents, props changed)
head/sys/dev/ath/ath_hal/ar5416/ar9285.h (contents, props changed)
head/sys/dev/ath/ath_hal/ar5416/ar9285_attach.c (contents, props changed)
head/sys/dev/ath/ath_hal/ar5416/ar9285_reset.c (contents, props changed)
Modified:
head/sys/conf/files
head/sys/dev/ath/ath_hal/ah.h
head/sys/dev/ath/ath_hal/ar5416/ar5416.h
head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
head/sys/dev/ath/ath_hal/ar5416/ar9280.h
head/sys/dev/ath/ath_hal/ar5416/ar9280_attach.c
Modified: head/sys/conf/files
==============================================================================
--- head/sys/conf/files Mon Feb 15 17:41:59 2010 (r203929)
+++ head/sys/conf/files Mon Feb 15 17:49:49 2010 (r203930)
@@ -555,7 +555,7 @@ dev/ath/ath_hal/ah_eeprom_v14.c \
optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 \
compile-with "${NORMAL_C} -I$S/dev/ath"
dev/ath/ath_hal/ah_eeprom_v4k.c \
- optional ath_hal | ath_ar9280 | ath_ar9285 \
+ optional ath_hal | ath_ar9285 \
compile-with "${NORMAL_C} -I$S/dev/ath"
dev/ath/ath_hal/ah_regdomain.c optional ath \
compile-with "${NORMAL_C} -I$S/dev/ath"
@@ -713,9 +713,14 @@ dev/ath/ath_hal/ar5416/ar5416_xmit.c \
# ar9160 (depends on ar5416)
dev/ath/ath_hal/ar5416/ar9160_attach.c optional ath_hal | ath_ar9160 \
compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
-# ar9280/ar9285 (depends on ar5416)
+# ar9280 (depends on ar5416)
dev/ath/ath_hal/ar5416/ar9280_attach.c optional ath_hal | ath_ar9280 | \
- ath_ar9285 \
+ ath_ar9285 \
+ compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
+# ar9285 (depends on ar5416 and ar9280)
+dev/ath/ath_hal/ar5416/ar9285_attach.c optional ath_hal | ath_ar9285 \
+ compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
+dev/ath/ath_hal/ar5416/ar9285_reset.c optional ath_hal | ath_ar9285 \
compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
# rf backends
dev/ath/ath_hal/ar5212/ar2316.c optional ath_rf2316 \
@@ -736,6 +741,8 @@ dev/ath/ath_hal/ar5416/ar2133.c optional
compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
dev/ath/ath_hal/ar5416/ar9280.c optional ath_hal | ath_ar9280 | ath_ar9285 \
compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
+dev/ath/ath_hal/ar5416/ar9285.c optional ath_hal | ath_ar9285 \
+ compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
# ath rate control algorithms
dev/ath/ath_rate/amrr/amrr.c optional ath_rate_amrr \
compile-with "${NORMAL_C} -I$S/dev/ath"
Modified: head/sys/dev/ath/ath_hal/ah.h
==============================================================================
--- head/sys/dev/ath/ath_hal/ah.h Mon Feb 15 17:41:59 2010
(r203929)
+++ head/sys/dev/ath/ath_hal/ah.h Mon Feb 15 17:49:49 2010
(r203930)
@@ -638,7 +638,11 @@ struct ath_hal {
HAL_BOOL longCal, HAL_BOOL *isCalDone);
HAL_BOOL __ahdecl(*ah_resetCalValid)(struct ath_hal *,
const struct ieee80211_channel *);
+ HAL_BOOL __ahdecl(*ah_setTxPower)(struct ath_hal *,
+ const struct ieee80211_channel *, uint16_t *);
HAL_BOOL __ahdecl(*ah_setTxPowerLimit)(struct ath_hal *, uint32_t);
+ HAL_BOOL __ahdecl(*ah_setBoardValues)(struct ath_hal *,
+ const struct ieee80211_channel *);
/* Transmit functions */
HAL_BOOL __ahdecl(*ah_updateTxTrigLevel)(struct ath_hal*,
Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416.h
==============================================================================
--- head/sys/dev/ath/ath_hal/ar5416/ar5416.h Mon Feb 15 17:41:59 2010
(r203929)
+++ head/sys/dev/ath/ath_hal/ar5416/ar5416.h Mon Feb 15 17:49:49 2010
(r203930)
@@ -21,6 +21,7 @@
#include "ar5212/ar5212.h"
#include "ar5416_cal.h"
+#include "ah_eeprom_v14.h" /* for CAL_TARGET_POWER_* */
#define AR5416_MAGIC 0x20065416
@@ -179,12 +180,27 @@ extern HAL_RFGAIN ar5416GetRfgain(struct
extern HAL_BOOL ar5416Disable(struct ath_hal *ah);
extern HAL_BOOL ar5416ChipReset(struct ath_hal *ah,
const struct ieee80211_channel *);
+extern HAL_BOOL ar5416SetBoardValues(struct ath_hal *,
+ const struct ieee80211_channel *);
extern HAL_BOOL ar5416SetResetReg(struct ath_hal *, uint32_t type);
extern HAL_BOOL ar5416SetTxPowerLimit(struct ath_hal *ah, uint32_t limit);
+extern HAL_BOOL ar5416SetTransmitPower(struct ath_hal *,
+ const struct ieee80211_channel *, uint16_t *);
extern HAL_BOOL ar5416GetChipPowerLimits(struct ath_hal *ah,
struct ieee80211_channel *chan);
extern void ar5416GetChannelCenters(struct ath_hal *,
const struct ieee80211_channel *chan, CHAN_CENTERS *centers);
+extern void ar5416GetTargetPowers(struct ath_hal *ah,
+ const struct ieee80211_channel *chan,
+ CAL_TARGET_POWER_HT *powInfo,
+ uint16_t numChannels, CAL_TARGET_POWER_HT *pNewPower,
+ uint16_t numRates, HAL_BOOL isHt40Target);
+extern void ar5416GetTargetPowersLeg(struct ath_hal *ah,
+ const struct ieee80211_channel *chan,
+ CAL_TARGET_POWER_LEG *powInfo,
+ uint16_t numChannels, CAL_TARGET_POWER_LEG *pNewPower,
+ uint16_t numRates, HAL_BOOL isExtTarget);
+
extern HAL_BOOL ar5416StopTxDma(struct ath_hal *ah, u_int q);
extern HAL_BOOL ar5416SetupTxDesc(struct ath_hal *ah, struct ath_desc *ds,
Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c Mon Feb 15 17:41:59
2010 (r203929)
+++ head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c Mon Feb 15 17:49:49
2010 (r203930)
@@ -89,6 +89,8 @@ ar5416InitState(struct ath_hal_5416 *ahp
ah->ah_perCalibrationN = ar5416PerCalibrationN,
ah->ah_resetCalValid = ar5416ResetCalValid,
ah->ah_setTxPowerLimit = ar5416SetTxPowerLimit;
+ ah->ah_setTxPower = ar5416SetTransmitPower;
+ ah->ah_setBoardValues = ar5416SetBoardValues;
/* Transmit functions */
ah->ah_stopTxDma = ar5416StopTxDma;
Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c Mon Feb 15 17:41:59
2010 (r203929)
+++ head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c Mon Feb 15 17:49:49
2010 (r203930)
@@ -45,9 +45,6 @@ static void ar5416InitIMR(struct ath_hal
static void ar5416InitQoS(struct ath_hal *ah);
static void ar5416InitUserSettings(struct ath_hal *ah);
-static HAL_BOOL ar5416SetTransmitPower(struct ath_hal *ah,
- const struct ieee80211_channel *chan, uint16_t *rfXpdGain);
-
#if 0
static HAL_BOOL ar5416ChannelChange(struct ath_hal *, const struct
ieee80211_channel *);
#endif
@@ -56,7 +53,6 @@ static void ar5416SetDeltaSlope(struct a
static HAL_BOOL ar5416SetResetPowerOn(struct ath_hal *ah);
static HAL_BOOL ar5416SetReset(struct ath_hal *ah, int type);
static void ar5416InitPLL(struct ath_hal *ah, const struct ieee80211_channel
*chan);
-static HAL_BOOL ar5416SetBoardValues(struct ath_hal *, const struct
ieee80211_channel *);
static HAL_BOOL ar5416SetPowerPerRateTable(struct ath_hal *ah,
struct ar5416eeprom *pEepData,
const struct ieee80211_channel *chan, int16_t *ratesArray,
@@ -69,14 +65,6 @@ static HAL_BOOL ar5416SetPowerCalTable(s
int16_t *pTxPowerIndexOffset);
static uint16_t ar5416GetMaxEdgePower(uint16_t freq,
CAL_CTL_EDGES *pRdEdgesPower, HAL_BOOL is2GHz);
-static void ar5416GetTargetPowers(struct ath_hal *ah,
- const struct ieee80211_channel *chan, CAL_TARGET_POWER_HT *powInfo,
- uint16_t numChannels, CAL_TARGET_POWER_HT *pNewPower,
- uint16_t numRates, HAL_BOOL isHt40Target);
-static void ar5416GetTargetPowersLeg(struct ath_hal *ah,
- const struct ieee80211_channel *chan, CAL_TARGET_POWER_LEG *powInfo,
- uint16_t numChannels, CAL_TARGET_POWER_LEG *pNewPower,
- uint16_t numRates, HAL_BOOL isExtTarget);
static int16_t interpolate(uint16_t target, uint16_t srcLeft,
uint16_t srcRight, int16_t targetLeft, int16_t targetRight);
@@ -224,7 +212,7 @@ ar5416Reset(struct ath_hal *ah, HAL_OPMO
OS_REG_WRITE(ah, AR_SELFGEN_MASK, AH5416(ah)->ah_tx_chainmask);
/* Setup the transmit power values. */
- if (!ar5416SetTransmitPower(ah, chan, rfXpdGain)) {
+ if (!ah->ah_setTxPower(ah, chan, rfXpdGain)) {
HALDEBUG(ah, HAL_DEBUG_ANY,
"%s: error init'ing transmit power\n", __func__);
FAIL(HAL_EIO);
@@ -245,7 +233,7 @@ ar5416Reset(struct ath_hal *ah, HAL_OPMO
AH5416(ah)->ah_spurMitigate(ah, chan);
/* Setup board specific options for EEPROM version 3 */
- if (!ar5416SetBoardValues(ah, chan)) {
+ if (!ah->ah_setBoardValues(ah, chan)) {
HALDEBUG(ah, HAL_DEBUG_ANY,
"%s: error setting board options\n", __func__);
FAIL(HAL_EIO);
@@ -793,7 +781,7 @@ typedef enum Ar5416_Rates {
* Set the transmit power in the baseband for the given
* operating channel and mode.
*/
-static HAL_BOOL
+HAL_BOOL
ar5416SetTransmitPower(struct ath_hal *ah,
const struct ieee80211_channel *chan, uint16_t *rfXpdGain)
{
@@ -1185,7 +1173,7 @@ ar5416InitPLL(struct ath_hal *ah, const
* Read EEPROM header info and program the device for correct operation
* given the channel value.
*/
-static HAL_BOOL
+HAL_BOOL
ar5416SetBoardValues(struct ath_hal *ah, const struct ieee80211_channel *chan)
{
const HAL_EEPROM_v14 *ee = AH_PRIVATE(ah)->ah_eeprom;
@@ -1622,7 +1610,7 @@ ar5416GetMaxEdgePower(uint16_t freq, CAL
* Return the rates of target power for the given target power table
* channel, and number of channels
*/
-static void
+void
ar5416GetTargetPowers(struct ath_hal *ah, const struct ieee80211_channel
*chan,
CAL_TARGET_POWER_HT *powInfo, uint16_t numChannels,
CAL_TARGET_POWER_HT *pNewPower, uint16_t numRates,
@@ -1681,7 +1669,7 @@ ar5416GetTargetPowers(struct ath_hal *ah
* Return the four rates of target power for the given target power table
* channel, and number of channels
*/
-static void
+void
ar5416GetTargetPowersLeg(struct ath_hal *ah,
const struct ieee80211_channel *chan,
CAL_TARGET_POWER_LEG *powInfo, uint16_t numChannels,
Modified: head/sys/dev/ath/ath_hal/ar5416/ar9280.h
==============================================================================
--- head/sys/dev/ath/ath_hal/ar5416/ar9280.h Mon Feb 15 17:41:59 2010
(r203929)
+++ head/sys/dev/ath/ath_hal/ar5416/ar9280.h Mon Feb 15 17:49:49 2010
(r203930)
@@ -39,4 +39,7 @@ HAL_BOOL ar9280RfAttach(struct ath_hal *
struct ath_hal;
HAL_BOOL ar9280SetAntennaSwitch(struct ath_hal *, HAL_ANT_SETTING);
+void ar9280SpurMitigate(struct ath_hal *,
+ const struct ieee80211_channel *);
+
#endif /* _ATH_AR9280_H_ */
Modified: head/sys/dev/ath/ath_hal/ar5416/ar9280_attach.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ar5416/ar9280_attach.c Mon Feb 15 17:41:59
2010 (r203929)
+++ head/sys/dev/ath/ath_hal/ar5416/ar9280_attach.c Mon Feb 15 17:49:49
2010 (r203930)
@@ -64,8 +64,6 @@ static void ar9280ConfigPCIE(struct ath_
static HAL_BOOL ar9280FillCapabilityInfo(struct ath_hal *ah);
static void ar9280WriteIni(struct ath_hal *ah,
const struct ieee80211_channel *chan);
-static void ar9280SpurMitigate(struct ath_hal *ah,
- const struct ieee80211_channel *chan);
static void
ar9280AniSetup(struct ath_hal *ah)
@@ -360,7 +358,7 @@ ar9280WriteIni(struct ath_hal *ah, const
#define AR_SPUR_FEEQ_BOUND_HT40 19
#define AR_SPUR_FEEQ_BOUND_HT20 10
-static void
+void
ar9280SpurMitigate(struct ath_hal *ah, const struct ieee80211_channel *chan)
{
static const int pilot_mask_reg[4] = { AR_PHY_TIMING7, AR_PHY_TIMING8,
Added: head/sys/dev/ath/ath_hal/ar5416/ar9285.c
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/ath/ath_hal/ar5416/ar9285.c Mon Feb 15 17:49:49 2010
(r203930)
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2008-2009 Sam Leffler, Errno Consulting
+ * Copyright (c) 2008 Atheros Communications, Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ * $FreeBSD$
+ */
+#include "opt_ah.h"
+
+#include "ah.h"
+#include "ah_internal.h"
+
+#include "ah_eeprom_v14.h"
+
+#include "ar5416/ar9280.h"
+#include "ar5416/ar9285.h"
+#include "ar5416/ar5416reg.h"
+#include "ar5416/ar5416phy.h"
+
+static void
+ar9285GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[])
+{
+ int16_t nf;
+
+ nf = MS(OS_REG_READ(ah, AR_PHY_CCA), AR9280_PHY_MINCCA_PWR);
+ if (nf & 0x100)
+ nf = 0 - ((nf ^ 0x1ff) + 1);
+ HALDEBUG(ah, HAL_DEBUG_NFCAL,
+ "NF calibrated [ctl] [chain 0] is %d\n", nf);
+ nfarray[0] = nf;
+
+ nfarray[1] = 0;
+
+ nf = MS(OS_REG_READ(ah, AR_PHY_EXT_CCA), AR9280_PHY_EXT_MINCCA_PWR);
+ if (nf & 0x100)
+ nf = 0 - ((nf ^ 0x1ff) + 1);
+ HALDEBUG(ah, HAL_DEBUG_NFCAL,
+ "NF calibrated [ext] [chain 0] is %d\n", nf);
+ nfarray[3] = nf;
+
+ nfarray[4] = 0;
+}
+
+HAL_BOOL
+ar9285RfAttach(struct ath_hal *ah, HAL_STATUS *status)
+{
+ if (ar9280RfAttach(ah, status) == AH_FALSE)
+ return AH_FALSE;
+
+ AH_PRIVATE(ah)->ah_getNoiseFloor = ar9285GetNoiseFloor;
+
+ return AH_TRUE;
+}
Added: head/sys/dev/ath/ath_hal/ar5416/ar9285.h
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/ath/ath_hal/ar5416/ar9285.h Mon Feb 15 17:49:49 2010
(r203930)
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2008-2009 Sam Leffler, Errno Consulting
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ * $FreeBSD$
+ */
+#ifndef _ATH_AR9285_H_
+#define _ATH_AR9285_H_
+
+#include "ar5416/ar5416.h"
+
+struct ath_hal_9285 {
+ struct ath_hal_5416 ah_5416;
+
+ HAL_INI_ARRAY ah_ini_txgain;
+ HAL_INI_ARRAY ah_ini_rxgain;
+};
+#define AH9285(_ah) ((struct ath_hal_9285 *)(_ah))
+
+#define AR9285_DEFAULT_RXCHAINMASK 1
+#define AR9285_DEFAULT_TXCHAINMASK 1
+
+
+HAL_BOOL ar9285SetAntennaSwitch(struct ath_hal *, HAL_ANT_SETTING);
+HAL_BOOL ar9285RfAttach(struct ath_hal *, HAL_STATUS *);
+
+extern HAL_BOOL ar9285SetTransmitPower(struct ath_hal *,
+ const struct ieee80211_channel *, uint16_t *);
+extern HAL_BOOL ar9285SetBoardValues(struct ath_hal *,
+ const struct ieee80211_channel *);
+
+#endif /* _ATH_AR9285_H_ */
Added: head/sys/dev/ath/ath_hal/ar5416/ar9285_attach.c
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/ath/ath_hal/ar5416/ar9285_attach.c Mon Feb 15 17:49:49
2010 (r203930)
@@ -0,0 +1,395 @@
+/*
+ * Copyright (c) 2008-2009 Sam Leffler, Errno Consulting
+ * Copyright (c) 2008 Atheros Communications, Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ * $FreeBSD$
+ */
+#include "opt_ah.h"
+
+#include "ah.h"
+#include "ah_internal.h"
+#include "ah_devid.h"
+
+#include "ah_eeprom_v4k.h" /* XXX for tx/rx gain */
+
+#include "ar5416/ar9280.h"
+#include "ar5416/ar9285.h"
+#include "ar5416/ar5416reg.h"
+#include "ar5416/ar5416phy.h"
+
+#include "ar5416/ar9285.ini"
+#include "ar5416/ar9285v2.ini"
+#include "ar5416/ar9280v2.ini" /* XXX ini for tx/rx gain */
+
+static const HAL_PERCAL_DATA ar9280_iq_cal = { /* single sample */
+ .calName = "IQ", .calType = IQ_MISMATCH_CAL,
+ .calNumSamples = MIN_CAL_SAMPLES,
+ .calCountMax = PER_MAX_LOG_COUNT,
+ .calCollect = ar5416IQCalCollect,
+ .calPostProc = ar5416IQCalibration
+};
+static const HAL_PERCAL_DATA ar9280_adc_gain_cal = { /* single sample */
+ .calName = "ADC Gain", .calType = ADC_GAIN_CAL,
+ .calNumSamples = MIN_CAL_SAMPLES,
+ .calCountMax = PER_MIN_LOG_COUNT,
+ .calCollect = ar5416AdcGainCalCollect,
+ .calPostProc = ar5416AdcGainCalibration
+};
+static const HAL_PERCAL_DATA ar9280_adc_dc_cal = { /* single sample */
+ .calName = "ADC DC", .calType = ADC_DC_CAL,
+ .calNumSamples = MIN_CAL_SAMPLES,
+ .calCountMax = PER_MIN_LOG_COUNT,
+ .calCollect = ar5416AdcDcCalCollect,
+ .calPostProc = ar5416AdcDcCalibration
+};
+static const HAL_PERCAL_DATA ar9280_adc_init_dc_cal = {
+ .calName = "ADC Init DC", .calType = ADC_DC_INIT_CAL,
+ .calNumSamples = MIN_CAL_SAMPLES,
+ .calCountMax = INIT_LOG_COUNT,
+ .calCollect = ar5416AdcDcCalCollect,
+ .calPostProc = ar5416AdcDcCalibration
+};
+
+static void ar9285ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
+static HAL_BOOL ar9285FillCapabilityInfo(struct ath_hal *ah);
+static void ar9285WriteIni(struct ath_hal *ah,
+ const struct ieee80211_channel *chan);
+
+static void
+ar9285AniSetup(struct ath_hal *ah)
+{
+ /* NB: disable ANI for reliable RIFS rx */
+ ar5212AniAttach(ah, AH_NULL, AH_NULL, AH_FALSE);
+}
+
+/*
+ * Attach for an AR9285 part.
+ */
+static struct ath_hal *
+ar9285Attach(uint16_t devid, HAL_SOFTC sc,
+ HAL_BUS_TAG st, HAL_BUS_HANDLE sh, HAL_STATUS *status)
+{
+ struct ath_hal_9285 *ahp9285;
+ struct ath_hal_5212 *ahp;
+ struct ath_hal *ah;
+ uint32_t val;
+ HAL_STATUS ecode;
+ HAL_BOOL rfStatus;
+
+ HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
+ __func__, sc, (void*) st, (void*) sh);
+
+ /* NB: memory is returned zero'd */
+ ahp9285 = ath_hal_malloc(sizeof (struct ath_hal_9285));
+ if (ahp9285 == AH_NULL) {
+ HALDEBUG(AH_NULL, HAL_DEBUG_ANY,
+ "%s: cannot allocate memory for state block\n", __func__);
+ *status = HAL_ENOMEM;
+ return AH_NULL;
+ }
+ ahp = AH5212(ahp9285);
+ ah = &ahp->ah_priv.h;
+
+ ar5416InitState(AH5416(ah), devid, sc, st, sh, status);
+
+ /* XXX override with 9285 specific state */
+ /* override 5416 methods for our needs */
+ ah->ah_setAntennaSwitch = ar9285SetAntennaSwitch;
+ ah->ah_configPCIE = ar9285ConfigPCIE;
+ ah->ah_setTxPower = ar9285SetTransmitPower;
+ ah->ah_setBoardValues = ar9285SetBoardValues;
+
+ AH5416(ah)->ah_cal.iqCalData.calData = &ar9280_iq_cal;
+ AH5416(ah)->ah_cal.adcGainCalData.calData = &ar9280_adc_gain_cal;
+ AH5416(ah)->ah_cal.adcDcCalData.calData = &ar9280_adc_dc_cal;
+ AH5416(ah)->ah_cal.adcDcCalInitData.calData = &ar9280_adc_init_dc_cal;
+ AH5416(ah)->ah_cal.suppCals = ADC_GAIN_CAL | ADC_DC_CAL |
IQ_MISMATCH_CAL;
+
+ AH5416(ah)->ah_spurMitigate = ar9280SpurMitigate;
+ AH5416(ah)->ah_writeIni = ar9285WriteIni;
+ AH5416(ah)->ah_rx_chainmask = AR9285_DEFAULT_RXCHAINMASK;
+ AH5416(ah)->ah_tx_chainmask = AR9285_DEFAULT_TXCHAINMASK;
+
+ if (!ar5416SetResetReg(ah, HAL_RESET_POWER_ON)) {
+ /* reset chip */
+ HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't reset chip\n",
+ __func__);
+ ecode = HAL_EIO;
+ goto bad;
+ }
+
+ if (!ar5416SetPowerMode(ah, HAL_PM_AWAKE, AH_TRUE)) {
+ HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't wakeup chip\n",
+ __func__);
+ ecode = HAL_EIO;
+ goto bad;
+ }
+ /* Read Revisions from Chips before taking out of reset */
+ val = OS_REG_READ(ah, AR_SREV);
+ HALDEBUG(ah, HAL_DEBUG_ATTACH,
+ "%s: ID 0x%x VERSION 0x%x TYPE 0x%x REVISION 0x%x\n",
+ __func__, MS(val, AR_XSREV_ID), MS(val, AR_XSREV_VERSION),
+ MS(val, AR_XSREV_TYPE), MS(val, AR_XSREV_REVISION));
+ /* NB: include chip type to differentiate from pre-Sowl versions */
+ AH_PRIVATE(ah)->ah_macVersion =
+ (val & AR_XSREV_VERSION) >> AR_XSREV_TYPE_S;
+ AH_PRIVATE(ah)->ah_macRev = MS(val, AR_XSREV_REVISION);
+ AH_PRIVATE(ah)->ah_ispcie = (val & AR_XSREV_TYPE_HOST_MODE) == 0;
+
+ /* setup common ini data; rf backends handle remainder */
+ if (AR_SREV_KITE_12_OR_LATER(ah)) {
+ HAL_INI_INIT(&ahp->ah_ini_modes, ar9285Modes_v2, 6);
+ HAL_INI_INIT(&ahp->ah_ini_common, ar9285Common_v2, 2);
+ HAL_INI_INIT(&AH5416(ah)->ah_ini_pcieserdes,
+ ar9285PciePhy_clkreq_always_on_L1_v2, 2);
+ } else {
+ HAL_INI_INIT(&ahp->ah_ini_modes, ar9285Modes, 6);
+ HAL_INI_INIT(&ahp->ah_ini_common, ar9285Common, 2);
+ HAL_INI_INIT(&AH5416(ah)->ah_ini_pcieserdes,
+ ar9285PciePhy_clkreq_always_on_L1, 2);
+ }
+ ar5416AttachPCIE(ah);
+
+ ecode = ath_hal_v4kEepromAttach(ah);
+ if (ecode != HAL_OK)
+ goto bad;
+
+ if (!ar5416ChipReset(ah, AH_NULL)) { /* reset chip */
+ HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n",
+ __func__);
+ ecode = HAL_EIO;
+ goto bad;
+ }
+
+ AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID);
+
+ if (!ar5212ChipTest(ah)) {
+ HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n",
+ __func__);
+ ecode = HAL_ESELFTEST;
+ goto bad;
+ }
+
+ /*
+ * Set correct Baseband to analog shift
+ * setting to access analog chips.
+ */
+ OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);
+
+ /* Read Radio Chip Rev Extract */
+ AH_PRIVATE(ah)->ah_analog5GhzRev = ar5416GetRadioRev(ah);
+ switch (AH_PRIVATE(ah)->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR) {
+ case AR_RAD2133_SREV_MAJOR: /* Sowl: 2G/3x3 */
+ case AR_RAD5133_SREV_MAJOR: /* Sowl: 2+5G/3x3 */
+ break;
+ default:
+ if (AH_PRIVATE(ah)->ah_analog5GhzRev == 0) {
+ AH_PRIVATE(ah)->ah_analog5GhzRev =
+ AR_RAD5133_SREV_MAJOR;
+ break;
+ }
+#ifdef AH_DEBUG
+ HALDEBUG(ah, HAL_DEBUG_ANY,
+ "%s: 5G Radio Chip Rev 0x%02X is not supported by "
+ "this driver\n", __func__,
+ AH_PRIVATE(ah)->ah_analog5GhzRev);
+ ecode = HAL_ENOTSUPP;
+ goto bad;
+#endif
+ }
+ rfStatus = ar9285RfAttach(ah, &ecode);
+ if (!rfStatus) {
+ HALDEBUG(ah, HAL_DEBUG_ANY, "%s: RF setup failed, status %u\n",
+ __func__, ecode);
+ goto bad;
+ }
+
+ HAL_INI_INIT(&ahp9285->ah_ini_rxgain, ar9280Modes_original_rxgain_v2,
+ 6);
+ /* setup txgain table */
+ switch (ath_hal_eepromGet(ah, AR_EEP_TXGAIN_TYPE, AH_NULL)) {
+ case AR5416_EEP_TXGAIN_HIGH_POWER:
+ HAL_INI_INIT(&ahp9285->ah_ini_txgain,
+ ar9285Modes_high_power_tx_gain_v2, 6);
+ break;
+ case AR5416_EEP_TXGAIN_ORIG:
+ HAL_INI_INIT(&ahp9285->ah_ini_txgain,
+ ar9285Modes_original_tx_gain_v2, 6);
+ break;
+ default:
+ HALASSERT(AH_FALSE);
+ goto bad; /* XXX ? try to continue */
+ }
+
+ /*
+ * Got everything we need now to setup the capabilities.
+ */
+ if (!ar9285FillCapabilityInfo(ah)) {
+ ecode = HAL_EEREAD;
+ goto bad;
+ }
+
+ ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr);
+ if (ecode != HAL_OK) {
+ HALDEBUG(ah, HAL_DEBUG_ANY,
+ "%s: error getting mac address from EEPROM\n", __func__);
+ goto bad;
+ }
+ /* XXX How about the serial number ? */
+ /* Read Reg Domain */
+ AH_PRIVATE(ah)->ah_currentRD =
+ ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, AH_NULL);
+
+ /*
+ * ah_miscMode is populated by ar5416FillCapabilityInfo()
+ * starting from griffin. Set here to make sure that
+ * AR_MISC_MODE_MIC_NEW_LOC_ENABLE is set before a GTK is
+ * placed into hardware.
+ */
+ if (ahp->ah_miscMode != 0)
+ OS_REG_WRITE(ah, AR_MISC_MODE, ahp->ah_miscMode);
+
+ ar9285AniSetup(ah); /* Anti Noise Immunity */
+ ar5416InitNfHistBuff(AH5416(ah)->ah_cal.nfCalHist);
+
+ HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__);
+
+ return ah;
+bad:
+ if (ah != AH_NULL)
+ ah->ah_detach(ah);
+ if (status)
+ *status = ecode;
+ return AH_NULL;
+}
+
+static void
+ar9285ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore)
+{
+ if (AH_PRIVATE(ah)->ah_ispcie && !restore) {
+ ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_pcieserdes, 1, 0);
+ OS_DELAY(1000);
+ OS_REG_SET_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA);
+ OS_REG_WRITE(ah, AR_WA, AR9285_WA_DEFAULT);
+ }
+}
+
+static void
+ar9285WriteIni(struct ath_hal *ah, const struct ieee80211_channel *chan)
+{
+ u_int modesIndex, freqIndex;
+ int regWrites = 0;
+
+ /* Setup the indices for the next set of register array writes */
+ /* XXX Ignore 11n dynamic mode on the AR5416 for the moment */
+ freqIndex = 2;
+ if (IEEE80211_IS_CHAN_HT40(chan))
+ modesIndex = 3;
+ else if (IEEE80211_IS_CHAN_108G(chan))
+ modesIndex = 5;
+ else
+ modesIndex = 4;
+
+ /* Set correct Baseband to analog shift setting to access analog chips.
*/
+ OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);
+ OS_REG_WRITE(ah, AR_PHY_ADC_SERIAL_CTL, AR_PHY_SEL_INTERNAL_ADDAC);
+ regWrites = ath_hal_ini_write(ah, &AH5212(ah)->ah_ini_modes,
+ modesIndex, regWrites);
+ if (AR_SREV_KITE_12_OR_LATER(ah)) {
+ regWrites = ath_hal_ini_write(ah, &AH9285(ah)->ah_ini_txgain,
+ modesIndex, regWrites);
+ }
+ regWrites = ath_hal_ini_write(ah, &AH5212(ah)->ah_ini_common,
+ 1, regWrites);
+
+}
+
+/*
+ * Fill all software cached or static hardware state information.
+ * Return failure if capabilities are to come from EEPROM and
+ * cannot be read.
+ */
+static HAL_BOOL
+ar9285FillCapabilityInfo(struct ath_hal *ah)
+{
+ HAL_CAPABILITIES *pCap = &AH_PRIVATE(ah)->ah_caps;
+
+ if (!ar5416FillCapabilityInfo(ah))
+ return AH_FALSE;
+ pCap->halNumGpioPins = 12;
+ pCap->halWowSupport = AH_TRUE;
+ pCap->halWowMatchPatternExact = AH_TRUE;
+#if 0
+ pCap->halWowMatchPatternDword = AH_TRUE;
+#endif
+ pCap->halCSTSupport = AH_TRUE;
+ pCap->halRifsRxSupport = AH_TRUE;
+ pCap->halRifsTxSupport = AH_TRUE;
+ pCap->halRtsAggrLimit = 64*1024; /* 802.11n max */
+ pCap->halExtChanDfsSupport = AH_TRUE;
+#if 0
+ /* XXX bluetooth */
+ pCap->halBtCoexSupport = AH_TRUE;
+#endif
+ pCap->halAutoSleepSupport = AH_FALSE; /* XXX? */
+#if 0
+ pCap->hal4kbSplitTransSupport = AH_FALSE;
+#endif
+ pCap->halRxStbcSupport = 1;
+ pCap->halTxStbcSupport = 1;
+
+ return AH_TRUE;
+}
+
+HAL_BOOL
+ar9285SetAntennaSwitch(struct ath_hal *ah, HAL_ANT_SETTING settings)
+{
+#define ANTENNA0_CHAINMASK 0x1
+#define ANTENNA1_CHAINMASK 0x2
+ struct ath_hal_5416 *ahp = AH5416(ah);
+
+ /* Antenna selection is done by setting the tx/rx chainmasks approp. */
+ switch (settings) {
+ case HAL_ANT_FIXED_A:
+ /* Enable first antenna only */
+ ahp->ah_tx_chainmask = ANTENNA0_CHAINMASK;
+ ahp->ah_rx_chainmask = ANTENNA0_CHAINMASK;
+ break;
+ case HAL_ANT_FIXED_B:
+ /* Enable second antenna only, after checking capability */
+ if (AH_PRIVATE(ah)->ah_caps.halTxChainMask > ANTENNA1_CHAINMASK)
+ ahp->ah_tx_chainmask = ANTENNA1_CHAINMASK;
+ ahp->ah_rx_chainmask = ANTENNA1_CHAINMASK;
+ break;
+ case HAL_ANT_VARIABLE:
+ /* Restore original chainmask settings */
+ /* XXX */
+ ahp->ah_tx_chainmask = AR5416_DEFAULT_TXCHAINMASK;
+ ahp->ah_rx_chainmask = AR5416_DEFAULT_RXCHAINMASK;
+ break;
+ }
+ return AH_TRUE;
+#undef ANTENNA0_CHAINMASK
+#undef ANTENNA1_CHAINMASK
+}
+
+static const char*
+ar9285Probe(uint16_t vendorid, uint16_t devid)
+{
+ if (vendorid == ATHEROS_VENDOR_ID && devid == AR9285_DEVID_PCIE)
+ return "Atheros 9285";
+ return AH_NULL;
+}
+AH_CHIP(AR9285, ar9285Probe, ar9285Attach);
Added: head/sys/dev/ath/ath_hal/ar5416/ar9285_reset.c
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/ath/ath_hal/ar5416/ar9285_reset.c Mon Feb 15 17:49:49
2010 (r203930)
@@ -0,0 +1,951 @@
+/*
+ * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
+ * Copyright (c) 2002-2008 Atheros Communications, Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ * $FreeBSD$
+ */
+
+/*
+ * This is almost the same as ar5416_reset.c but uses the v4k EEPROM and
+ * supports only 2Ghz operation.
+ */
+
+#include "opt_ah.h"
+
+#include "ah.h"
+#include "ah_internal.h"
+#include "ah_devid.h"
+
+#include "ah_eeprom_v14.h"
+#include "ah_eeprom_v4k.h"
+
+#include "ar5416/ar9285.h"
+#include "ar5416/ar5416.h"
+#include "ar5416/ar5416reg.h"
+#include "ar5416/ar5416phy.h"
+
+/* Eeprom versioning macros. Returns true if the version is equal or newer
than the ver specified */
+#define EEP_MINOR(_ah) \
+ (AH_PRIVATE(_ah)->ah_eeversion & AR5416_EEP_VER_MINOR_MASK)
+#define IS_EEP_MINOR_V2(_ah) (EEP_MINOR(_ah) >= AR5416_EEP_MINOR_VER_2)
+#define IS_EEP_MINOR_V3(_ah) (EEP_MINOR(_ah) >= AR5416_EEP_MINOR_VER_3)
+
+/* Additional Time delay to wait after activiting the Base band */
+#define BASE_ACTIVATE_DELAY 100 /* 100 usec */
+#define PLL_SETTLE_DELAY 300 /* 300 usec */
+#define RTC_PLL_SETTLE_DELAY 1000 /* 1 ms */
+
+static HAL_BOOL ar9285SetPowerPerRateTable(struct ath_hal *ah,
+ struct ar5416eeprom_4k *pEepData,
+ const struct ieee80211_channel *chan, int16_t *ratesArray,
+ uint16_t cfgCtl, uint16_t AntennaReduction,
+ uint16_t twiceMaxRegulatoryPower,
+ uint16_t powerLimit);
+static HAL_BOOL ar9285SetPowerCalTable(struct ath_hal *ah,
+ struct ar5416eeprom_4k *pEepData,
+ const struct ieee80211_channel *chan,
+ int16_t *pTxPowerIndexOffset);
+static int16_t interpolate(uint16_t target, uint16_t srcLeft,
+ uint16_t srcRight, int16_t targetLeft, int16_t targetRight);
+static HAL_BOOL ar9285FillVpdTable(uint8_t, uint8_t, uint8_t *, uint8_t *,
+ uint16_t, uint8_t *);
+static void ar9285GetGainBoundariesAndPdadcs(struct ath_hal *ah,
+ const struct ieee80211_channel *chan, CAL_DATA_PER_FREQ_4K *pRawDataSet,
+ uint8_t * bChans, uint16_t availPiers,
+ uint16_t tPdGainOverlap, int16_t *pMinCalPower,
+ uint16_t * pPdGainBoundaries, uint8_t * pPDADCValues,
+ uint16_t numXpdGains);
+static HAL_BOOL getLowerUpperIndex(uint8_t target, uint8_t *pList,
+ uint16_t listSize, uint16_t *indexL, uint16_t *indexR);
+static uint16_t ar9285GetMaxEdgePower(uint16_t, CAL_CTL_EDGES *);
+
+/* XXX gag, this is sick */
+typedef enum Ar5416_Rates {
+ rate6mb, rate9mb, rate12mb, rate18mb,
+ rate24mb, rate36mb, rate48mb, rate54mb,
+ rate1l, rate2l, rate2s, rate5_5l,
+ rate5_5s, rate11l, rate11s, rateXr,
+ rateHt20_0, rateHt20_1, rateHt20_2, rateHt20_3,
+ rateHt20_4, rateHt20_5, rateHt20_6, rateHt20_7,
+ rateHt40_0, rateHt40_1, rateHt40_2, rateHt40_3,
+ rateHt40_4, rateHt40_5, rateHt40_6, rateHt40_7,
+ rateDupCck, rateDupOfdm, rateExtCck, rateExtOfdm,
+ Ar5416RateSize
+} AR5416_RATES;
+
+HAL_BOOL
+ar9285SetTransmitPower(struct ath_hal *ah,
+ const struct ieee80211_channel *chan, uint16_t *rfXpdGain)
+{
+#define POW_SM(_r, _s) (((_r) & 0x3f) << (_s))
+#define N(a) (sizeof (a) / sizeof (a[0]))
+
+ MODAL_EEP4K_HEADER *pModal;
+ struct ath_hal_5212 *ahp = AH5212(ah);
+ int16_t ratesArray[Ar5416RateSize];
+ int16_t txPowerIndexOffset = 0;
+ uint8_t ht40PowerIncForPdadc = 2;
+ int i;
+
+ uint16_t cfgCtl;
+ uint16_t powerLimit;
+ uint16_t twiceAntennaReduction;
+ uint16_t twiceMaxRegulatoryPower;
+ int16_t maxPower;
+ HAL_EEPROM_v4k *ee = AH_PRIVATE(ah)->ah_eeprom;
+ struct ar5416eeprom_4k *pEepData = &ee->ee_base;
+
+ HALASSERT(AH_PRIVATE(ah)->ah_eeversion >= AR_EEPROM_VER14_1);
+
+ /* Setup info for the actual eeprom */
+ OS_MEMZERO(ratesArray, sizeof(ratesArray));
+ cfgCtl = ath_hal_getctl(ah, chan);
+ powerLimit = chan->ic_maxregpower * 2;
+ twiceAntennaReduction = chan->ic_maxantgain;
+ twiceMaxRegulatoryPower = AH_MIN(MAX_RATE_POWER,
AH_PRIVATE(ah)->ah_powerLimit);
+ pModal = &pEepData->modalHeader;
+ HALDEBUG(ah, HAL_DEBUG_RESET, "%s Channel=%u CfgCtl=%u\n",
+ __func__,chan->ic_freq, cfgCtl );
+
+ if (IS_EEP_MINOR_V2(ah)) {
+ ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc;
+ }
+
+ if (!ar9285SetPowerPerRateTable(ah, pEepData, chan,
+ &ratesArray[0],cfgCtl,
+ twiceAntennaReduction,
+ twiceMaxRegulatoryPower, powerLimit)) {
+ HALDEBUG(ah, HAL_DEBUG_ANY,
+ "%s: unable to set tx power per rate table\n", __func__);
+ return AH_FALSE;
+ }
+
+ if (!ar9285SetPowerCalTable(ah, pEepData, chan, &txPowerIndexOffset)) {
+ HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unable to set power table\n",
+ __func__);
+ return AH_FALSE;
+ }
+
+ maxPower = AH_MAX(ratesArray[rate6mb], ratesArray[rateHt20_0]);
+ maxPower = AH_MAX(maxPower, ratesArray[rate1l]);
+
+ if (IEEE80211_IS_CHAN_HT40(chan)) {
+ maxPower = AH_MAX(maxPower, ratesArray[rateHt40_0]);
+ }
+
+ ahp->ah_tx6PowerInHalfDbm = maxPower;
+ AH_PRIVATE(ah)->ah_maxPowerLevel = maxPower;
+ ahp->ah_txPowerIndexOffset = txPowerIndexOffset;
+
+ /*
+ * txPowerIndexOffset is set by the SetPowerTable() call -
+ * adjust the rate table (0 offset if rates EEPROM not loaded)
+ */
+ for (i = 0; i < N(ratesArray); i++) {
+ ratesArray[i] = (int16_t)(txPowerIndexOffset + ratesArray[i]);
+ if (ratesArray[i] > AR5416_MAX_RATE_POWER)
+ ratesArray[i] = AR5416_MAX_RATE_POWER;
+ ratesArray[i] -= AR5416_PWR_TABLE_OFFSET_DB * 2;
+ }
+
+#ifdef AH_EEPROM_DUMP
+ ar5416PrintPowerPerRate(ah, ratesArray);
+#endif
+
+ /* Write the OFDM power per rate set */
+ OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE1,
+ POW_SM(ratesArray[rate18mb], 24)
+ | POW_SM(ratesArray[rate12mb], 16)
+ | POW_SM(ratesArray[rate9mb], 8)
+ | POW_SM(ratesArray[rate6mb], 0)
+ );
+ OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE2,
+ POW_SM(ratesArray[rate54mb], 24)
+ | POW_SM(ratesArray[rate48mb], 16)
+ | POW_SM(ratesArray[rate36mb], 8)
+ | POW_SM(ratesArray[rate24mb], 0)
+ );
+
+ /* Write the CCK power per rate set */
+ OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE3,
+ POW_SM(ratesArray[rate2s], 24)
+ | POW_SM(ratesArray[rate2l], 16)
+ | POW_SM(ratesArray[rateXr], 8) /* XR target power */
+ | POW_SM(ratesArray[rate1l], 0)
+ );
+ OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE4,
+ POW_SM(ratesArray[rate11s], 24)
+ | POW_SM(ratesArray[rate11l], 16)
+ | POW_SM(ratesArray[rate5_5s], 8)
+ | POW_SM(ratesArray[rate5_5l], 0)
+ );
+ HALDEBUG(ah, HAL_DEBUG_RESET,
+ "%s AR_PHY_POWER_TX_RATE3=0x%x AR_PHY_POWER_TX_RATE4=0x%x\n",
+ __func__, OS_REG_READ(ah,AR_PHY_POWER_TX_RATE3),
+ OS_REG_READ(ah,AR_PHY_POWER_TX_RATE4));
+
+ /* Write the HT20 power per rate set */
+ OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE5,
+ POW_SM(ratesArray[rateHt20_3], 24)
+ | POW_SM(ratesArray[rateHt20_2], 16)
+ | POW_SM(ratesArray[rateHt20_1], 8)
+ | POW_SM(ratesArray[rateHt20_0], 0)
+ );
+ OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE6,
+ POW_SM(ratesArray[rateHt20_7], 24)
+ | POW_SM(ratesArray[rateHt20_6], 16)
+ | POW_SM(ratesArray[rateHt20_5], 8)
+ | POW_SM(ratesArray[rateHt20_4], 0)
+ );
+
+ if (IEEE80211_IS_CHAN_HT40(chan)) {
+ /* Write the HT40 power per rate set */
+ /* Correct PAR difference between HT40 and HT20/LEGACY */
+ OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE7,
+ POW_SM(ratesArray[rateHt40_3] + ht40PowerIncForPdadc, 24)
+ | POW_SM(ratesArray[rateHt40_2] + ht40PowerIncForPdadc, 16)
+ | POW_SM(ratesArray[rateHt40_1] + ht40PowerIncForPdadc, 8)
+ | POW_SM(ratesArray[rateHt40_0] + ht40PowerIncForPdadc, 0)
+ );
+ OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE8,
+ POW_SM(ratesArray[rateHt40_7] + ht40PowerIncForPdadc, 24)
+ | POW_SM(ratesArray[rateHt40_6] + ht40PowerIncForPdadc, 16)
+ | POW_SM(ratesArray[rateHt40_5] + ht40PowerIncForPdadc, 8)
+ | POW_SM(ratesArray[rateHt40_4] + ht40PowerIncForPdadc, 0)
+ );
+ /* Write the Dup/Ext 40 power per rate set */
+ OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE9,
+ POW_SM(ratesArray[rateExtOfdm], 24)
+ | POW_SM(ratesArray[rateExtCck], 16)
+ | POW_SM(ratesArray[rateDupOfdm], 8)
+ | POW_SM(ratesArray[rateDupCck], 0)
+ );
+ }
+
+ return AH_TRUE;
+#undef POW_SM
+#undef N
+}
+
+HAL_BOOL
+ar9285SetBoardValues(struct ath_hal *ah, const struct ieee80211_channel *chan)
+{
+ const HAL_EEPROM_v4k *ee = AH_PRIVATE(ah)->ah_eeprom;
+ const struct ar5416eeprom_4k *eep = &ee->ee_base;
+ const MODAL_EEP4K_HEADER *pModal;
+ int i, regChainOffset;
+ uint8_t txRxAttenLocal; /* workaround for eeprom versions <=
14.2 */
+
+ HALASSERT(AH_PRIVATE(ah)->ah_eeversion >= AR_EEPROM_VER14_1);
+ pModal = &eep->modalHeader;
+
+ /* NB: workaround for eeprom versions <= 14.2 */
+ txRxAttenLocal = 23;
+
+ OS_REG_WRITE(ah, AR_PHY_SWITCH_COM, pModal->antCtrlCommon);
+ for (i = 0; i < AR5416_4K_MAX_CHAINS; i++) {
+ if (AR_SREV_MERLIN(ah)) {
+ if (i >= 2) break;
+ }
+ if (AR_SREV_OWL_20_OR_LATER(ah) &&
+ (AH5416(ah)->ah_rx_chainmask == 0x5 ||
+ AH5416(ah)->ah_tx_chainmask == 0x5) && i != 0) {
+ /* Regs are swapped from chain 2 to 1 for 5416 2_0 with
+ * only chains 0 and 2 populated
+ */
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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