Author: ian
Date: Fri Dec 13 22:22:54 2013
New Revision: 259348
URL: http://svnweb.freebsd.org/changeset/base/259348
Log:
MFC r257418:
Don't iterate through the bits of the pending interrupt register if the
whole register is zero. Most of the registers will be zero most of the
time.
Modified:
stable/10/sys/arm/freescale/imx/tzic.c
Directory Properties:
stable/10/ (props changed)
Modified: stable/10/sys/arm/freescale/imx/tzic.c
==============================================================================
--- stable/10/sys/arm/freescale/imx/tzic.c Fri Dec 13 22:21:49 2013
(r259347)
+++ stable/10/sys/arm/freescale/imx/tzic.c Fri Dec 13 22:22:54 2013
(r259348)
@@ -163,7 +163,7 @@ arm_get_next_irq(int last_irq)
for (i = 0; i < 4; i++) {
pending = tzic_read_4(TZIC_PND(i));
- for (b = 0; b < 32; b++)
+ for (b = 0; pending != 0 && b < 32; b++)
if (pending & (1 << b)) {
return (i * 32 + b);
}
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