Author: imp
Date: Fri Apr 26 05:42:35 2013
New Revision: 249919
URL: http://svnweb.freebsd.org/changeset/base/249919
Log:
Octeon 2 (6xxx) and newer CPUs don't use the clock CPU speed for its
I/O clock. Thankfully, the simple executive provies a way to querry
the proper clock that works on all models. Move to asking for the SCLK
via this interface.
This gets the serial console working after we start init and open the
console and set the divisor (which turned the output from good to
bad). I can login on the console now.
Modified:
head/sys/mips/cavium/uart_dev_oct16550.c
Modified: head/sys/mips/cavium/uart_dev_oct16550.c
==============================================================================
--- head/sys/mips/cavium/uart_dev_oct16550.c Fri Apr 26 05:18:18 2013
(r249918)
+++ head/sys/mips/cavium/uart_dev_oct16550.c Fri Apr 26 05:42:35 2013
(r249919)
@@ -656,7 +656,7 @@ oct16550_bus_probe (struct uart_softc *s
int error;
bas = &sc->sc_bas;
- bas->rclk = uart_oct16550_class.uc_rclk =
cvmx_sysinfo_get()->cpu_clock_hz;
+ bas->rclk = uart_oct16550_class.uc_rclk =
cvmx_clock_get_rate(CVMX_CLOCK_SCLK);
error = oct16550_probe(bas);
if (error) {
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