Author: dim
Date: Sat Feb 23 22:48:12 2013
New Revision: 247205
URL: http://svnweb.freebsd.org/changeset/base/247205
Log:
Pull in r175962 from upstream llvm trunk:
X86: Disable cmov-memory patterns on subtargets without cmov.
Fixes PR15115.
For the i386 arch, this should enable cmov instructions only on
-march=pentiumpro and higher. Since our default CPU is i486, cmov
instructions will now be disabled by default.
MFC after: 1 week
Modified:
head/contrib/llvm/lib/Target/X86/X86InstrCompiler.td
Modified: head/contrib/llvm/lib/Target/X86/X86InstrCompiler.td
==============================================================================
--- head/contrib/llvm/lib/Target/X86/X86InstrCompiler.td Sat Feb 23
22:46:26 2013 (r247204)
+++ head/contrib/llvm/lib/Target/X86/X86InstrCompiler.td Sat Feb 23
22:48:12 2013 (r247205)
@@ -1076,12 +1076,14 @@ def : Pat<(X86cmp GR64:$src1, 0),
// inverted.
multiclass CMOVmr<PatLeaf InvertedCond, Instruction Inst16, Instruction Inst32,
Instruction Inst64> {
- def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, InvertedCond, EFLAGS),
- (Inst16 GR16:$src2, addr:$src1)>;
- def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, InvertedCond, EFLAGS),
- (Inst32 GR32:$src2, addr:$src1)>;
- def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, InvertedCond, EFLAGS),
- (Inst64 GR64:$src2, addr:$src1)>;
+ let Predicates = [HasCMov] in {
+ def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, InvertedCond, EFLAGS),
+ (Inst16 GR16:$src2, addr:$src1)>;
+ def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, InvertedCond, EFLAGS),
+ (Inst32 GR32:$src2, addr:$src1)>;
+ def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, InvertedCond, EFLAGS),
+ (Inst64 GR64:$src2, addr:$src1)>;
+ }
}
defm : CMOVmr<X86_COND_B , CMOVAE16rm, CMOVAE32rm, CMOVAE64rm>;
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