Author: yongari
Date: Mon Nov 26 04:34:05 2012
New Revision: 243549
URL: http://svnweb.freebsd.org/changeset/base/243549
Log:
MFC r241983-241985:
r241983:
Do not hardcode phy address. Multi-port controllers use different phy
address.
r241984:
Ethernet@WireSpeed is defined for 1000baseT adapter to establish a
link at a lower speed so enabling it for fiber adapters is wrong.
Fix the issue by setting BGE_PHY_NO_WIRESPEED such that brgphy(4)
wouldn't enable the feature.
While I'm here move PHY specific feature/bug configuration to new
location(just before mii attach) for readability.
r241985:
For fast ethernet controllers, Ethernet@WireSpeed is not defined so
explicitly set BGE_PHY_NO_WIRESPEED flag.
Modified:
stable/9/sys/dev/bge/if_bge.c
stable/9/sys/dev/bge/if_bgereg.h
Directory Properties:
stable/9/sys/ (props changed)
stable/9/sys/dev/ (props changed)
Modified: stable/9/sys/dev/bge/if_bge.c
==============================================================================
--- stable/9/sys/dev/bge/if_bge.c Mon Nov 26 04:29:47 2012
(r243548)
+++ stable/9/sys/dev/bge/if_bge.c Mon Nov 26 04:34:05 2012
(r243549)
@@ -3240,7 +3240,7 @@ bge_attach(device_t dev)
struct bge_softc *sc;
uint32_t hwcfg = 0, misccfg, pcistate;
u_char eaddr[ETHER_ADDR_LEN];
- int capmask, error, msicount, phy_addr, reg, rid, trys;
+ int capmask, error, msicount, reg, rid, trys;
sc = device_get_softc(dev);
sc->bge_dev = dev;
@@ -3300,7 +3300,7 @@ bge_attach(device_t dev)
sc->bge_chiprev = BGE_CHIPREV(sc->bge_chipid);
/* Set default PHY address. */
- phy_addr = 1;
+ sc->bge_phy_addr = 1;
/*
* PHY address mapping for various devices.
*
@@ -3329,29 +3329,18 @@ bge_attach(device_t dev)
if (sc->bge_chipid != BGE_CHIPID_BCM5717_A0) {
if (CSR_READ_4(sc, BGE_SGDIG_STS) &
BGE_SGDIGSTS_IS_SERDES)
- phy_addr = sc->bge_func_addr + 8;
+ sc->bge_phy_addr = sc->bge_func_addr + 8;
else
- phy_addr = sc->bge_func_addr + 1;
+ sc->bge_phy_addr = sc->bge_func_addr + 1;
} else {
if (CSR_READ_4(sc, BGE_CPMU_PHY_STRAP) &
BGE_CPMU_PHY_STRAP_IS_SERDES)
- phy_addr = sc->bge_func_addr + 8;
+ sc->bge_phy_addr = sc->bge_func_addr + 8;
else
- phy_addr = sc->bge_func_addr + 1;
+ sc->bge_phy_addr = sc->bge_func_addr + 1;
}
}
- /*
- * Don't enable Ethernet@WireSpeed for the 5700, 5906, or the
- * 5705 A0 and A1 chips.
- */
- if (sc->bge_asicrev == BGE_ASICREV_BCM5700 ||
- (sc->bge_asicrev == BGE_ASICREV_BCM5705 &&
- (sc->bge_chipid != BGE_CHIPID_BCM5705_A0 &&
- sc->bge_chipid != BGE_CHIPID_BCM5705_A1)) ||
- sc->bge_asicrev == BGE_ASICREV_BCM5906)
- sc->bge_phy_flags |= BGE_PHY_NO_WIRESPEED;
-
if (bge_has_eaddr(sc))
sc->bge_flags |= BGE_FLAG_EADDR;
@@ -3436,38 +3425,6 @@ bge_attach(device_t dev)
/* Add SYSCTLs, requires the chipset family to be set. */
bge_add_sysctls(sc);
- /* Set various PHY bug flags. */
- if (sc->bge_chipid == BGE_CHIPID_BCM5701_A0 ||
- sc->bge_chipid == BGE_CHIPID_BCM5701_B0)
- sc->bge_phy_flags |= BGE_PHY_CRC_BUG;
- if (sc->bge_chiprev == BGE_CHIPREV_5703_AX ||
- sc->bge_chiprev == BGE_CHIPREV_5704_AX)
- sc->bge_phy_flags |= BGE_PHY_ADC_BUG;
- if (sc->bge_chipid == BGE_CHIPID_BCM5704_A0)
- sc->bge_phy_flags |= BGE_PHY_5704_A0_BUG;
- if (pci_get_subvendor(dev) == DELL_VENDORID)
- sc->bge_phy_flags |= BGE_PHY_NO_3LED;
- if ((BGE_IS_5705_PLUS(sc)) &&
- sc->bge_asicrev != BGE_ASICREV_BCM5906 &&
- sc->bge_asicrev != BGE_ASICREV_BCM5717 &&
- sc->bge_asicrev != BGE_ASICREV_BCM5719 &&
- sc->bge_asicrev != BGE_ASICREV_BCM5720 &&
- sc->bge_asicrev != BGE_ASICREV_BCM5785 &&
- sc->bge_asicrev != BGE_ASICREV_BCM57765 &&
- sc->bge_asicrev != BGE_ASICREV_BCM57780) {
- if (sc->bge_asicrev == BGE_ASICREV_BCM5755 ||
- sc->bge_asicrev == BGE_ASICREV_BCM5761 ||
- sc->bge_asicrev == BGE_ASICREV_BCM5784 ||
- sc->bge_asicrev == BGE_ASICREV_BCM5787) {
- if (pci_get_device(dev) != BCOM_DEVICEID_BCM5722 &&
- pci_get_device(dev) != BCOM_DEVICEID_BCM5756)
- sc->bge_phy_flags |= BGE_PHY_JITTER_BUG;
- if (pci_get_device(dev) == BCOM_DEVICEID_BCM5755M)
- sc->bge_phy_flags |= BGE_PHY_ADJUST_TRIM;
- } else
- sc->bge_phy_flags |= BGE_PHY_BER_BUG;
- }
-
/* Identify the chips that use an CPMU. */
if (BGE_IS_5717_PLUS(sc) ||
sc->bge_asicrev == BGE_ASICREV_BCM5784 ||
@@ -3528,6 +3485,7 @@ bge_attach(device_t dev)
sc->bge_asicrev == BGE_ASICREV_BCM5906) {
/* These chips are 10/100 only. */
capmask &= ~BMSR_EXTSTAT;
+ sc->bge_phy_flags |= BGE_PHY_NO_WIRESPEED;
}
/*
@@ -3785,12 +3743,55 @@ bge_attach(device_t dev)
/* The SysKonnect SK-9D41 is a 1000baseSX card. */
if ((pci_read_config(dev, BGE_PCI_SUBSYS, 4) >> 16) ==
SK_SUBSYSID_9D41 || (hwcfg & BGE_HWCFG_MEDIA) == BGE_MEDIA_FIBER) {
- if (BGE_IS_5705_PLUS(sc))
+ if (BGE_IS_5705_PLUS(sc)) {
sc->bge_flags |= BGE_FLAG_MII_SERDES;
- else
+ sc->bge_phy_flags |= BGE_PHY_NO_WIRESPEED;
+ } else
sc->bge_flags |= BGE_FLAG_TBI;
}
+ /* Set various PHY bug flags. */
+ if (sc->bge_chipid == BGE_CHIPID_BCM5701_A0 ||
+ sc->bge_chipid == BGE_CHIPID_BCM5701_B0)
+ sc->bge_phy_flags |= BGE_PHY_CRC_BUG;
+ if (sc->bge_chiprev == BGE_CHIPREV_5703_AX ||
+ sc->bge_chiprev == BGE_CHIPREV_5704_AX)
+ sc->bge_phy_flags |= BGE_PHY_ADC_BUG;
+ if (sc->bge_chipid == BGE_CHIPID_BCM5704_A0)
+ sc->bge_phy_flags |= BGE_PHY_5704_A0_BUG;
+ if (pci_get_subvendor(dev) == DELL_VENDORID)
+ sc->bge_phy_flags |= BGE_PHY_NO_3LED;
+ if ((BGE_IS_5705_PLUS(sc)) &&
+ sc->bge_asicrev != BGE_ASICREV_BCM5906 &&
+ sc->bge_asicrev != BGE_ASICREV_BCM5717 &&
+ sc->bge_asicrev != BGE_ASICREV_BCM5719 &&
+ sc->bge_asicrev != BGE_ASICREV_BCM5720 &&
+ sc->bge_asicrev != BGE_ASICREV_BCM5785 &&
+ sc->bge_asicrev != BGE_ASICREV_BCM57765 &&
+ sc->bge_asicrev != BGE_ASICREV_BCM57780) {
+ if (sc->bge_asicrev == BGE_ASICREV_BCM5755 ||
+ sc->bge_asicrev == BGE_ASICREV_BCM5761 ||
+ sc->bge_asicrev == BGE_ASICREV_BCM5784 ||
+ sc->bge_asicrev == BGE_ASICREV_BCM5787) {
+ if (pci_get_device(dev) != BCOM_DEVICEID_BCM5722 &&
+ pci_get_device(dev) != BCOM_DEVICEID_BCM5756)
+ sc->bge_phy_flags |= BGE_PHY_JITTER_BUG;
+ if (pci_get_device(dev) == BCOM_DEVICEID_BCM5755M)
+ sc->bge_phy_flags |= BGE_PHY_ADJUST_TRIM;
+ } else
+ sc->bge_phy_flags |= BGE_PHY_BER_BUG;
+ }
+
+ /*
+ * Don't enable Ethernet@WireSpeed for the 5700 or the
+ * 5705 A0 and A1 chips.
+ */
+ if (sc->bge_asicrev == BGE_ASICREV_BCM5700 ||
+ (sc->bge_asicrev == BGE_ASICREV_BCM5705 &&
+ (sc->bge_chipid != BGE_CHIPID_BCM5705_A0 &&
+ sc->bge_chipid != BGE_CHIPID_BCM5705_A1)))
+ sc->bge_phy_flags |= BGE_PHY_NO_WIRESPEED;
+
if (sc->bge_flags & BGE_FLAG_TBI) {
ifmedia_init(&sc->bge_ifmedia, IFM_IMASK, bge_ifmedia_upd,
bge_ifmedia_sts);
@@ -3814,13 +3815,13 @@ again:
bge_asf_driver_up(sc);
error = mii_attach(dev, &sc->bge_miibus, ifp, bge_ifmedia_upd,
- bge_ifmedia_sts, capmask, phy_addr, MII_OFFSET_ANY,
+ bge_ifmedia_sts, capmask, sc->bge_phy_addr, MII_OFFSET_ANY,
MIIF_DOPAUSE);
if (error != 0) {
if (trys++ < 4) {
device_printf(sc->bge_dev, "Try again\n");
- bge_miibus_writereg(sc->bge_dev, 1, MII_BMCR,
- BMCR_RESET);
+ bge_miibus_writereg(sc->bge_dev,
+ sc->bge_phy_addr, MII_BMCR, BMCR_RESET);
goto again;
}
device_printf(sc->bge_dev, "attaching PHYs failed\n");
@@ -6042,9 +6043,10 @@ bge_link_upd(struct bge_softc *sc)
/* Clear the interrupt. */
CSR_WRITE_4(sc, BGE_MAC_EVT_ENB,
BGE_EVTENB_MI_INTERRUPT);
- bge_miibus_readreg(sc->bge_dev, 1, BRGPHY_MII_ISR);
- bge_miibus_writereg(sc->bge_dev, 1, BRGPHY_MII_IMR,
- BRGPHY_INTRS);
+ bge_miibus_readreg(sc->bge_dev, sc->bge_phy_addr,
+ BRGPHY_MII_ISR);
+ bge_miibus_writereg(sc->bge_dev, sc->bge_phy_addr,
+ BRGPHY_MII_IMR, BRGPHY_INTRS);
}
return;
}
Modified: stable/9/sys/dev/bge/if_bgereg.h
==============================================================================
--- stable/9/sys/dev/bge/if_bgereg.h Mon Nov 26 04:29:47 2012
(r243548)
+++ stable/9/sys/dev/bge/if_bgereg.h Mon Nov 26 04:34:05 2012
(r243549)
@@ -2984,6 +2984,7 @@ struct bge_softc {
#define BGE_MFW_TYPE_DASH 0x00000008
int bge_phy_ape_lock;
int bge_func_addr;
+ int bge_phy_addr;
uint32_t bge_phy_flags;
#define BGE_PHY_NO_WIRESPEED 0x00000001
#define BGE_PHY_ADC_BUG 0x00000002
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